question regarding External interrupt number in efr32fg14 evm

Thread Starter

yef smith

Joined Aug 2, 2020
689
Hello, in the link bellow the is a C code i am using for efr32fg14 evm.
in the line shown bellow,its signature is shown bellow.
GPIO_ExtIntConfig(BSP_GPIO_PB0_PORT, BSP_GPIO_PB0_PIN,BSP_GPIO_PB0_PIN, 0, 1, true);
I am confused regarding the logic of the term intNo
in reference manual section 31.3.5 page 1075 shown bellow.
In the Code we what to trigger Port F pin 6 so intNo is also 6 i cant see why from the text.
they say that for every pin we have our own interrupt external number.

calculated as Index/4 .
how exactly i see the logic of how to pick the intNo the External interrupt number?


https://www.silabs.com/documents/public/reference-manuals/efr32xg14-rm.pdf
https://github.com/SiliconLabs/peri...ries1/gpio/switch_led_interrupt/src/main_s1.c
1675775483608.png
1675775220466.png
 

MrChips

Joined Oct 2, 2009
30,436
If you can post the source code of GPIO_ExtIntConfig( ) we will be able to see what is being set with the intNo parameter.
 

Thread Starter

yef smith

Joined Aug 2, 2020
689
Hello Mr, Chips intNo is External interrupt number (not eripheral interrupt number)
The code of intNo shown bellow.
they say something about index/4.
what is the difference if we put IntNo 4 instead of IntNo6?
Thanks.
From refence manual we hae this diargam whatis the difference between
https://www.silabs.com/documents/public/reference-manuals/efr32xg14-rm.pdf
1675781769075.png
Code:
void GPIO_ExtIntConfig(GPIO_Port_TypeDef port,
                       unsigned int pin,
                       unsigned int intNo,
                       bool risingEdge,
                       bool fallingEdge,
                       bool enable)
{
#if defined (_GPIO_EXTIPSELH_MASK)
  uint32_t tmp = 0;
#endif
#if !defined(_GPIO_EXTIPINSELL_MASK)
  (void)pin;
#endif

  EFM_ASSERT(GPIO_PORT_PIN_VALID(port, pin));
#if defined(_GPIO_EXTIPINSELL_MASK)
  EFM_ASSERT(GPIO_INTNO_PIN_VALID(intNo, pin));
#endif

  /* The EXTIPSELL register controls pins 0-7 and EXTIPSELH controls
   * pins 8-15 of the interrupt configuration. */
  if (intNo < 8) {
    BUS_RegMaskedWrite(&GPIO->EXTIPSELL,
                       _GPIO_EXTIPSELL_EXTIPSEL0_MASK
                       << (_GPIO_EXTIPSELL_EXTIPSEL1_SHIFT * intNo),
                       port << (_GPIO_EXTIPSELL_EXTIPSEL1_SHIFT * intNo));
  } else {
#if defined(_GPIO_EXTIPSELH_MASK)
    tmp = intNo - 8;
#if defined(_GPIO_EXTIPSELH_EXTIPSEL0_MASK)
    BUS_RegMaskedWrite(&GPIO->EXTIPSELH,
                       _GPIO_EXTIPSELH_EXTIPSEL0_MASK
                       << (_GPIO_EXTIPSELH_EXTIPSEL1_SHIFT * tmp),
                       port << (_GPIO_EXTIPSELH_EXTIPSEL1_SHIFT * tmp));
#elif defined(_GPIO_EXTIPSELH_EXTIPSEL8_MASK)
    BUS_RegMaskedWrite(&GPIO->EXTIPSELH,
                       _GPIO_EXTIPSELH_EXTIPSEL8_MASK
                       << (_GPIO_EXTIPSELH_EXTIPSEL9_SHIFT * tmp),
                       port << (_GPIO_EXTIPSELH_EXTIPSEL9_SHIFT * tmp));
#else
#error Invalid GPIO_EXTIPINSELH bit fields
#endif
#endif /* #if defined(_GPIO_EXTIPSELH_MASK) */
  }

#if defined(_GPIO_EXTIPINSELL_MASK)

  /* The EXTIPINSELL register controls interrupt 0-7 and EXTIPINSELH controls
   * interrupt 8-15 of the interrupt/pin number mapping. */
  if (intNo < 8) {
    BUS_RegMaskedWrite(&GPIO->EXTIPINSELL,
                       _GPIO_EXTIPINSELL_EXTIPINSEL0_MASK
                       << (_GPIO_EXTIPINSELL_EXTIPINSEL1_SHIFT * intNo),
                       ((pin % 4) & _GPIO_EXTIPINSELL_EXTIPINSEL0_MASK)
                       << (_GPIO_EXTIPINSELL_EXTIPINSEL1_SHIFT * intNo));
  } else {
#if defined (_GPIO_EXTIPINSELH_MASK) && !defined(_SILICON_LABS_32B_SERIES_2)
    BUS_RegMaskedWrite(&GPIO->EXTIPINSELH,
                       _GPIO_EXTIPINSELH_EXTIPINSEL8_MASK
                       << (_GPIO_EXTIPINSELH_EXTIPINSEL9_SHIFT * tmp),
                       ((pin % 4) & _GPIO_EXTIPINSELH_EXTIPINSEL8_MASK)
                       << (_GPIO_EXTIPSELH_EXTIPSEL9_SHIFT * tmp));
#endif
  }
#endif

  /* Enable/disable the rising edge interrupt. */
  BUS_RegBitWrite(&(GPIO->EXTIRISE), intNo, risingEdge);

  /* Enable/disable the falling edge interrupt. */
  BUS_RegBitWrite(&(GPIO->EXTIFALL), intNo, fallingEdge);

  /* Clear any pending interrupt. */
  GPIO_IntClear(1 << intNo);

  /* Finally enable/disable interrupt. */
  BUS_RegBitWrite(&(GPIO->IEN), intNo, enable);
}
 

MrChips

Joined Oct 2, 2009
30,436
It would appear that 4 pins are grouped into one interrupt.
For example, pins 4, 5, 6, 7 fall into one group.
You can select where the interrupt goes, i.e. INT 4, 5 6, or 7.
In all the code examples I have seen, they use the same intNo as the pin, e.g., for pin = 6, use intNo = 6.
 

Thread Starter

yef smith

Joined Aug 2, 2020
689
Hello Mr Chips,i noticed a phenomena when i have intNo=4 it rises a flag at GPIO_IF at the 1st place(starting from zero).
Only int clear at this 1st bit place lowers the flag back.
Why intNo=4 rases a flag at 1st place?
full code attached bellow.
Thanks.
GPIO_ExtIntConfig(BSP_GPIO_PB0_PORT, BSP_GPIO_PB0_PIN,4, 0, 1, true);
GPIO_IntClear(0x0b00000000000000010);

Code:
/***************************************************************************//**
 * @file main_s1.c
 * @brief This project demonstrates a using GPIOs to trigger external 
 * interrupts. When PB0 or PB1 is pressed, LED0 or LED1 is toggled, 
 * respectively. See readme.txt for details.
 *******************************************************************************
 * # License
 * <b>Copyright 2020 Silicon Laboratories Inc. www.silabs.com</b>
 *******************************************************************************
 *
 * SPDX-License-Identifier: Zlib
 *
 * The licensor of this software is Silicon Laboratories Inc.
 *
 * This software is provided 'as-is', without any express or implied
 * warranty. In no event will the authors be held liable for any damages
 * arising from the use of this software.
 *
 * Permission is granted to anyone to use this software for any purpose,
 * including commercial applications, and to alter it and redistribute it
 * freely, subject to the following restrictions:
 *
 * 1. The origin of this software must not be misrepresented; you must not
 *    claim that you wrote the original software. If you use this software
 *    in a product, an acknowledgment in the product documentation would be
 *    appreciated but is not required.
 * 2. Altered source versions must be plainly marked as such, and must not be
 *    misrepresented as being the original software.
 * 3. This notice may not be removed or altered from any source distribution.
 *
 *******************************************************************************
 * # Evaluation Quality
 * This code has been minimally tested to ensure that it builds and is suitable 
 * as a demonstration for evaluation purposes only. This code will be maintained
 * at the sole discretion of Silicon Labs.
 ******************************************************************************/

#include "em_device.h"
#include "em_chip.h"
#include "em_cmu.h"
#include "em_emu.h"
#include "em_gpio.h"
#include "bsp.h"

/**************************************************************************//**
 * @brief GPIO Even IRQ for pushbuttons on even-numbered pins
 *****************************************************************************/
void GPIO_EVEN_IRQHandler(void) 
{
  // Clear all even pin interrupt flags
    uint32_t res;
    res=GPIO_IntGet();
    GPIO_IntClear(0x0b00000000000000010);

  // Toggle LED0
  GPIO_PinOutToggle(BSP_GPIO_LED0_PORT, BSP_GPIO_LED0_PIN);
}

/**************************************************************************//**
 * @brief GPIO Odd IRQ for pushbuttons on odd-numbered pins
 *****************************************************************************/
void GPIO_ODD_IRQHandler(void) 
{
    uint32_t res2;
    res2=GPIO_IntGet();
  // Clear all odd pin interrupt flags
  GPIO_IntClear(0b00000000000100000);

  // Toggle LED01
  GPIO_PinOutToggle(BSP_GPIO_LED1_PORT, BSP_GPIO_LED1_PIN);
}

/**************************************************************************//**
 * @brief GPIO initialization
 *****************************************************************************/
void initGPIO(void) 
{
  // Enable GPIO clock
  CMU_ClockEnable(cmuClock_GPIO, true);

  // Configure PB0 and PB1 as input with glitch filter enabled
  GPIO_PinModeSet(BSP_GPIO_PB0_PORT, BSP_GPIO_PB0_PIN, gpioModeInputPullFilter, 1);
  GPIO_PinModeSet(BSP_GPIO_PB1_PORT, BSP_GPIO_PB1_PIN, gpioModeInputPullFilter, 1);

  // Configure LED0 and LED1 as output
  GPIO_PinModeSet(BSP_GPIO_LED0_PORT, BSP_GPIO_LED0_PIN, gpioModePushPull, 0);
  GPIO_PinModeSet(BSP_GPIO_LED1_PORT, BSP_GPIO_LED1_PIN, gpioModePushPull, 0);

  // Enable IRQ for even numbered GPIO pins
  NVIC_EnableIRQ(GPIO_EVEN_IRQn);

  // Enable IRQ for odd numbered GPIO pins
  NVIC_EnableIRQ(GPIO_ODD_IRQn);

  // Enable falling-edge interrupts for PB pins
  GPIO_ExtIntConfig(BSP_GPIO_PB0_PORT, BSP_GPIO_PB0_PIN,4, 0, 1, true);
  GPIO_ExtIntConfig(BSP_GPIO_PB1_PORT, BSP_GPIO_PB1_PIN,5, 0, 1, true);
}

/**************************************************************************//**
 * @brief  Main function
 *****************************************************************************/
int main(void) 
{
  // Chip errata
  CHIP_Init();

  // Initializations
  initGPIO();

  while (1){
    // Enter Low Energy Mode until an interrupt occurs
    EMU_EnterEM3(false);
  }
}
 

MrChips

Joined Oct 2, 2009
30,436
I have not been able to understand what BUS_RegMaskedWrite( ) does.

BUS_RegMaskedWrite(&GPIO->EXTIPSELL, _GPIO_EXTIPSELL_EXTIPSEL0_MASK << (_GPIO_EXTIPSELL_EXTIPSEL1_SHIFT * intNo),
port << (_GPIO_EXTIPSELL_EXTIPSEL1_SHIFT * intNo));

_GPIO_EXTIPSELL_EXTIPSEL1_SHIFT = 4

Why are they shifting port by 4 * intNo bits?
I would have to look at the source code for BUS_RegMaskedWrite( ).

What you can do is try different intNo and see which bits in GPIO_EXTIPINSELL and GPIO_IF are being set.
 
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