Hi Danko,Hi Neko,
I guess this solution will make you happy:(You can tune zero crossing by value of capacitor C1)
View attachment 216804
Didn't see this yet. Looks awesome! will need to check out.
Thanks!
Neko
Hi Danko,Hi Neko,
I guess this solution will make you happy:(You can tune zero crossing by value of capacitor C1)
View attachment 216804
shall be waiting to see your circuitHi Alex,
Thanks for your response and comments. So, where can I get a crystal ball? You are about the load current. Any thoughts as to the load voltage looks so crazy? In the plots below, I added the 80mH series inductor:
View attachment 213564
Since the load current appears as expected, I'll build up the circuit to see how it performs.
Thanks again,
Neko
Hi Danko,Hi Neko,
I guess this solution will make you happy:(You can tune zero crossing by value of capacitor C1)
View attachment 216804


Thanks to all!Hi Danko,
Your sync circuit works exactly as advertised. Thanks! Below is a protoboard with your circuit and scope photos of the input and output:
View attachment 216935
View attachment 216937
and diodes
Next step will be to order the CME DC-DC isolated 5V- 12V converters, the FETs, diodes, and input filter components to test out the driver.
Thanks for all your help,
Neko
Hi,Thanks to all!![]()

I ordered the isolated DC-DC modules so I may build this version first: Below is the schematic of this version; the LTSPICE schematic is also attached:Hi,
Hi, I am planning on building up two versions of the complete circuit PWM circuit, one with Danko's homebrew isolated supplies and one with the CME isolated modules.
The attached is a schematic, not a simulation that I'll use to build from. The first version is shown below and is also attached:
View attachment 217066
Comments and corrections invited.
Thanks.
Neko


Hi Danko,Hi Neko,
Pay attention to capacitor C1:
Its Rser = 10Ω, so in series with C1 should be connected resistor 10Ω, 1W.
Better - wirewound, because of big pulse current.
Test setup:
View attachment 217201
Lamp prevents circuit components from damage because of possible short circuits and overcurrents.
Turning ON:
1. Turn Sw1 ON.
2. Wait 1...2 sec.
3. Turn Sw2 ON.
Shutdown:
1. Turn Sw2 OFF.
2. Turn Sw1 OFF.

Hey Everybody,Hi Danko,
Good advice! I will power up the circuit slowly using my little Variac:
View attachment 217257
When I tested the sync circuit last week, I brought the line voltage up slowly.
Thanks,
Neko


I forget all of the specs after the length of this project, but you may have some problems with this being on a breadboard. "Breadboard is commonly rated for five volts at one amp or fifteen volts at one-third of an amp, both of which have a power dissipation of five watts. Since these specifications vary depending on manufacturer and the type of breadboard, you should check the data sheet before purchasing your breadboard. Due to the temporary nature of the contacts, most breadboard has a current limit of one amp or less." From - https://www.circuitspecialists.com/blog/common-breadboard-specifications/Any thoughts or comments?
It is undesirable use filtered line V(d_m1) for synchronization, because of its noise.A question I had though is whether the delay through the LC filter will be a problem since the sync circuit runs on the raw, not filtered line input. I was thinking that to prevent cross conduction, the sync input should be the filtered line not the raw line.



Hi Report,I forget all of the specs after the length of this project, but you may have some problems with this being on a breadboard. "Breadboard is commonly rated for five volts at one amp or fifteen volts at one-third of an amp, both of which have a power dissipation of five watts. Since these specifications vary depending on manufacturer and the type of breadboard, you should check the data sheet before purchasing your breadboard. Due to the temporary nature of the contacts, most breadboard has a current limit of one amp or less." From - https://www.circuitspecialists.com/blog/common-breadboard-specifications/
Hi Danko,Hi Neko,
It is undesirable use filtered line V(d_m1) for synchronization, because of its noise.
How big is delay between raw line and filtered line, you can see below:
View attachment 217526
Pay attention to values of R14, R15 and to changes in U6 input connections (file PWM-test.asc in attachment).
Hi Neko,
It is undesirable use filtered line V(d_m1) for synchronization, because of its noise.
How big is delay between raw line and filtered line, you can see below:
View attachment 217526
Pay attention to values of R14, R15 and to changes in U6 input connections (file PWM-test.asc in attachment).
ADDED:
There is chain of delays: Optocoupler U4(U1) + OpAmp U5 + Gate Drive Optocoupler U6 + Transistor M3(M4).
In summary delay time is 285μs (R1 = 51.1k, R14 and C9 are absent).
Plot below shows shorted PWM pulses during time from 4ms (line zero crossing) to 4.285ms (when transistors M3 and M4 are switched).
View attachment 217694
With R1 = 51.1k, R14 = 155.1k, C9 = 6.8nF transistors M3 and M4 are switching without delay at time 4ms.
View attachment 217695
Hi Danko,Hi Neko,
It is undesirable use filtered line V(d_m1) for synchronization, because of its noise.
How big is delay between raw line and filtered line, you can see below:
View attachment 217526
Pay attention to values of R14, R15 and to changes in U6 input connections (file PWM-test.asc in attachment).
ADDED:
There is chain of delays: Optocoupler U4(U1) + OpAmp U5 + Gate Drive Optocoupler U6 + Transistor M3(M4).
In summary delay time is 285μs (R1 = 51.1k, R14 and C9 are absent).
Plot below shows shorted PWM pulses during time from 4ms (line zero crossing) to 4.285ms (when transistors M3 and M4 are switched).
View attachment 217694
With R1 = 51.1k, R14 = 155.1k, C9 = 6.8nF transistors M3 and M4 are switching without delay at time 4ms.
View attachment 217695
Hi Danko,Hi Neko,
It is undesirable use filtered line V(d_m1) for synchronization, because of its noise.
How big is delay between raw line and filtered line, you can see below:
View attachment 217526
Pay attention to values of R14, R15 and to changes in U6 input connections (file PWM-test.asc in attachment).
ADDED:
There is chain of delays: Optocoupler U4(U1) + OpAmp U5 + Gate Drive Optocoupler U6 + Transistor M3(M4).
In summary delay time is 285μs (R1 = 51.1k, R14 and C9 are absent).
Plot below shows shorted PWM pulses during time from 4ms (line zero crossing) to 4.285ms (when transistors M3 and M4 are switched).
View attachment 217694
With R1 = 51.1k, R14 = 155.1k, C9 = 6.8nF transistors M3 and M4 are switching without delay at time 4ms.
View attachment 217695

Hi cmartinez,Hi Danko,
Didn't see this post. Was about to go live tomorrow with
Hi Danko,
Was about to go live tomorrow with R14 at 3.92K and C9 at =6.8nF. The primary drive signals from the LTC6992 look good and the output of the HCLP-3140 looks good.
Based on you sim, I will make the change to R14, thanks.
View attachment 217951
Thanks again.
Neko
Hi Danko,Hi cmartinez,
Thanks for your support. Like I said in earlier posts, I just have to know if this PWM concept shows proof of concept in eliminating motor hum for reduced speeds for fans.
Am going to the finish line on this one and will report new results.
Thanks again,
Neko