1) I'm using a 4 bit carry lookahead adder to build a 8 bit parallel adder. I'm to calculate the maximum propagation delay time, assuming each gate introduces a unit time of propagation delay. I'm assuming not carry lookahead generators.

Would it just be 8 units of propagation delay?

2) If I had a 16 bit adder using carry lookahead generators, what would the maximum propagation delay time, assuming each gate introduces a unit time of propagation delay.

Thanks

 

are you building the adder from gates? if so, follow the inputs through the gates and move them one gate at a time. after each gate count one (e.g. t1, t2, t3, etc.). when all signals have reached the output you have your total.

 

Carry lookahead generators still have propagation delay, just less than going all the way through the carry outputs.

 

Is there a rule of thumb to use for propagation delay for 4 bit carry lookahead adders, that is if I were building a 8 bit adder with 4 bit parts the delay is, for example 2 x 4 units of propagation delay?

The same question if I were to use parts with carry lookahead generators, is there a rule of thumb to use to calculate delay for larger adders?

Is there any reference material where I could see how the propagation path is calculated?

Thanks

 

I cascaded tow 4 bit lookahead adders and traced out the longest path. 4 delay units for the 1st 4-bit and 4 delay units for the 2nd 4-bit, is the the correct reasoning?