LT6700-3 Propagation Delay (comparator)

Thread Starter

Vinnie90

Joined Jul 7, 2016
86
Hi all,
I have designed a circuit to measure the discharge of an unknown capacitor. I used a LT6700-3 to square off the the discharge (see schematic attached) and implemented the design on a 4 layers PCB.

When probing the signal at the two inputs of the LT6700-3 I see a time difference between the two input of few tens of nanoseconds only

but when looking at the two outputs the two signals have a delay around 500ns.

The first channel has a propagation delay of 7.5us while the second 8.0us. Is there anyway to mitigate this difference in propagation delays between the two comparators in the same IC?

Thanks,
Vince
 

SteveSh

Joined Nov 5, 2019
104
Isn't all you're seeing is the time difference between when Vin1 and Vin2 reach the switching point for the two comparators, which is set by the internal REF voltage?
 

TeeKay6

Joined Apr 20, 2019
531
Isn't all you're seeing is the time difference between when Vin1 and Vin2 reach the switching point for the two comparators, which is set by the internal REF voltage?
What the scope is showing is the time difference between the outputs of ch1 and ch2. Each LTC6700-3 channel has an inherent delay within the LT6700-3 that is relatively long and can vary considerably from device to device, and channel to channel within one device. Take a look at the datasheet, propagation delay. Also look at VTH(R) and VTH(F). This is a relatively slow comparator IC whose outstanding feature is low power consumption and having a built-in reference. In my opinion it is a very poor choice if you are trying to compare events occurring <1us apart. If you are concerned about differences of ns, then the prime spec for the comparator should be speed, not power. For most applications, having a built-in reference will not be of great value. As for reducing the apparent delay, there could well be several ways--all complex compared to starting with a fast comparator. Also, consider delay variation vs temperature, and vs power supply.
@Vinnie90
If you want advice, you need to tell us more. What is the range of delays that you wish to measure? What accuracy is required in that measurement? What range of capacitors will you test? What power supply voltage is available? And, in fact, just what is it you are trying to do? That is, why measure the discharge time of a cap?
 
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SteveSh

Joined Nov 5, 2019
104
What the scope is showing is the time difference between the outputs of ch1 and ch2. Each LTC6700-3 channel has an inherent delay within the LT6700-3 that is relatively long and can vary considerably from device to device, and channel to channel within one device. Take a look at the datasheet, propagation delay. Also look at VTH(R) and VTH(F). This is a relatively slow comparator IC whose outstanding feature is low power consumption and having a built-in reference. In my opinion it is a very poor choice if you are trying to compare events occurring <1us apart. If you are concerned about differences of ns, then the prime spec for the comparator should be speed, not power. For most applications, having a built-in reference will not be of great value. As for reducing the apparent delay, there could well be several ways--all complex compared to starting with a fast comparator. Also, consider delay variation vs temperature, and vs power supply.
Vinnie90 - Back to the first scope picture for a moment. If I'm interpreting the display readout correctly,
1) the lowest most dotted line is the 400 mV threshold, set by VREF
2) the two vertical lines mark where on the Vin1 and Vin2 traces they cross the 400 mV threshold
Is this correct?
 

SteveSh

Joined Nov 5, 2019
104
This is a relatively slow comparator IC whose outstanding feature is low power consumption and having a built-in reference. In my opinion it is a very poor choice if you are trying to compare events occurring <1us apart. If you are concerned about differences of ns, then the prime spec for the comparator should be speed, not power. For most applications, having a built-in reference will not be of great value.
@Vinnie90
I agree with TeeKay6 in that this part is not a good choice for resolving time differences < 1 us apart. Looking at the data sheet, we see that it is oriented towards battery monitoring applications, and we all know battery outputs changes relatively slowly. In general, speed and power in IC design do not go hand in hand. You trade off one for the other.
 

TeeKay6

Joined Apr 20, 2019
531
Vinnie90 - Back to the first scope picture for a moment. If I'm interpreting the display readout correctly,
1) the lowest most dotted line is the 400 mV threshold, set by VREF
2) the two vertical lines mark where on the Vin1 and Vin2 traces they cross the 400 mV threshold
Is this correct?
@SteveSh
I agree with your post#4 description of the scope trace. I disagree on what the trace means (as described in your post#2). It does not mean that the indicated difference in delay is real for the input signals (Vin1 & Vin2). The delay is real only for the comparator output signals (where the scope is connected). However, between the input signals and the output signals the comparators have introduced errors in delay that are not representative of the input signals. In this instance, the scope traces of output signals have little or no value in describing the relative timing of the input signals. Responding more directly to @Vinnie90 's question regarding mitigation of the error: My point is that if the huge variation in delays introduced by a specific LT6700-3 were somehow removed, it would still be difficult to trust the scope traces because the LT6700-3 delays vary so much between devices and between channels due both to device design and to effects of temperature (and as well, perhaps, to aging and supply voltage variation).
 

SteveSh

Joined Nov 5, 2019
104
Vinnie90 -
I know you said this in the beginning, but now that I understand what the 'scope pictures show, just want to confirm that you can't figure out where the ~500 ns difference in the two outputs of the comparator is coming from.

I could not find anything in the data sheet that talks about channel to channel matching, or channel delay differences for the '03 device. Both channels use the non-inv inputs of the two comparators, and both Vin1 and Vin2 are low-high going.

Maybe there really could be ~500 ns difference in the delays between the two channels, since the matching is not specified or discussed in the data sheet
 

Thread Starter

Vinnie90

Joined Jul 7, 2016
86
Thanks fellas for the feedback and thoughts :D

Let me try to answer to all the questions and the points @TeeKay6 amd @SteveSh raised:
1) the first scope picture shows the two inputs of the comparators (Vin1 and Vin2). I'm just displaying this to show that delay is introduced by the LT6700-3. The second scope picture shows the two comparator outputs with a 10k pull up.
2)
Maybe there really could be ~500 ns difference in the delays between the two channels, since the matching is not specified or discussed in the data sheet
I think my confusion comes exactly from this. In the datasheet the low-to-high and high-to-low propagation delays are given but only as typical values (29us and 18us respectively). Since I couldn't find the matching between the channels I assumed they were pretty much close (which I guess is true considering the mismatch is around 1%).
3) What I'm trying to build is something that will measure the change in capacitance for a special sensor we are developing in my lab. I had a delay counter design done for a different project so I though to adjust that also for this application (see the schematic)
thumbnail_IMG_20191123_142601.jpg
The capacitance can be measured by the discharge time of the RC section. I have a 10kHz square oscillator that charges and discharges the capacitor. I use the LT6700-3 (I need low power and I choose the LT6700-3 because I think that the internal reference will reduce the noise of the system) to square off when the capacitor discharges and also send the square wave straight into the comparator to add the same delay to it (or at least so I thought :p). The output of the LT6700 then are xored together and the output of the xor enables a 12bit counter with a 10MHz clock. The change in capacitance should go somewhere between the 500pF and 3.5nF, which corresponds roughly to a time delay between 15us and 86us. That is also why I didn't pick a faster comparator because I don't need to resolve fast events (but again I thought the comparator would have added the same delay to both channels).

Please let me know if I forgot to add anything
thanksssss
 

TeeKay6

Joined Apr 20, 2019
531
Thanks fellas for the feedback and thoughts :D

Let me try to answer to all the questions and the points @TeeKay6 amd @SteveSh raised:
1) the first scope picture shows the two inputs of the comparators (Vin1 and Vin2). I'm just displaying this to show that delay is introduced by the LT6700-3. The second scope picture shows the two comparator outputs with a 10k pull up.
2)
I think my confusion comes exactly from this. In the datasheet the low-to-high and high-to-low propagation delays are given but only as typical values (29us and 18us respectively). Since I couldn't find the matching between the channels I assumed they were pretty much close (which I guess is true considering the mismatch is around 1%).
3) What I'm trying to build is something that will measure the change in capacitance for a special sensor we are developing in my lab. I had a delay counter design done for a different project so I though to adjust that also for this application (see the schematic)
View attachment 192291
The capacitance can be measured by the discharge time of the RC section. I have a 10kHz square oscillator that charges and discharges the capacitor. I use the LT6700-3 (I need low power and I choose the LT6700-3 because I think that the internal reference will reduce the noise of the system) to square off when the capacitor discharges and also send the square wave straight into the comparator to add the same delay to it (or at least so I thought :p). The output of the LT6700 then are xored together and the output of the xor enables a 12bit counter with a 10MHz clock. The change in capacitance should go somewhere between the 500pF and 3.5nF, which corresponds roughly to a time delay between 15us and 86us. That is also why I didn't pick a faster comparator because I don't need to resolve fast events (but again I thought the comparator would have added the same delay to both channels).

Please let me know if I forgot to add anything
thanksssss
@Vinnie90
In my opinion you make an error when you assume matching where none is specified, in fact when not even a min or max is specified. If a device exhibits matching worth noting, you can be pretty sure that the manufacturer would include that very positive feature in the data sheet. Rather than matched sections, you can expect each channel of the comparator to exhibit the full range of variability stated in the data sheet. With regard to propagation delays, you cannot even give a reasonable estimate for a min or max as no useful info is given in the data sheet. A device would not be failed if it had a max/min ratio of 5 for one channel and a ratio of 0.2 for the other channel (or between different devices). You would likely be entitled to assume a smaller max/min variation for the average of many channels of multiple devices, but you could not reasonably complain if you did not find such. In any case, for your application, even small max/min variations are significant due to the long absolute delays. You can conceivably force equal delays between channels--for one device at one temperature at one supply voltage at one signal input level--by providing adjustable delays (e.g. an RC low-pass filter) at the inputs of the comparators.

As for your statement "...I didn't pick a faster comparator because I don't need to resolve fast events..." When you intended to measure 15-86us delays using a ruler that has variability at least as great as that full range, I think you were not thinking clearly. As with many extremely low power devices, the LT6700-3 is exceedingly slow.

You did not state whether your test had to run continuously or only for short bursts. Can you say? I am suggesting that operation in bursts allows lower average power than continuous operation...and thus faster comparators during the measurement burst.
 

SteveSh

Joined Nov 5, 2019
104
Thanks fellas for the feedback and thoughts :D

Let me try to answer to all the questions and the points @TeeKay6 amd @SteveSh raised:
2) I think my confusion comes exactly from this. In the datasheet the low-to-high and high-to-low propagation delays are given but only as typical values (29us and 18us respectively). Since I couldn't find the matching between the channels I assumed they were pretty much close (which I guess is true considering the mismatch is around 1%).
I think you've summed it up in comment 2). This is a slow part, tens of us delay, with no min or max specified, and you're seeing prop/delay times through the two channels within ~500 ns of each other. I would not expect better matching than that.

As an aside, below is a snippet from the data sheet for the 74LVT244 octal buffer. This is a digital part, not an analog device like your comparator, so to some extent this is an apples to oranges comparison. But note that this data sheet specifies min and max for prop times, and also specs an output to output (channel to channel) skew. The worst case skew is ~25% of the WC prop time.

1574557950444.png

There are comparators out there that specify the channel to channel matching and it sounds like you need to reexamine you choice of comparator.
 
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Thread Starter

Vinnie90

Joined Jul 7, 2016
86
In my opinion you make an error when you assume matching where none is specified, in fact when not even a min or max is specified.
That's clearly the case :p
As for your statement "...I didn't pick a faster comparator because I don't need to resolve fast events..." When you intended to measure 15-86us delays using a ruler that has variability at least as great as that full range, I think you were not thinking clearly. As with many extremely low power devices, the LT6700-3 is exceedingly slow.
I still think that if the two channels had had the same delay time it wouldn't have been a problem, as long as the delay is smaller than the driving oscillations (around 10kHz). My rational for that is that if we add to both channels the same delay both the outputs would be delayed of the same quantity but the delay of the second waveform with respect to the first would still be constant. But unfortunately I made the mistake of considering the delay for both channels to be somewhat matched.
You did not state whether your test had to run continuously or only for short bursts. Can you say? I am suggesting that operation in bursts allows lower average power than continuous operation...and thus faster comparators during the measurement burst.
We don't know yet. That will depend on the specific application of the sensor we are developing which is still not completely clear. But I'll keep that in mind
There are comparators out there that specify the channel to channel matching and it sounds like you need to reexamine you choice of comparator.
This is actually brings me to the next question. I added the analog comparator because I wanted to match the specification for rising and falling (especially for the discharging capacitor) edges for the input of the digital XOR in the next stage (to avoid undefined states in the transitions). I quickly tried to bypass the comparator and wired Vin1 and Vin2 (as in the schematic) directly to the input of the XOR. By doing that it works, but I'm definitely not matching the input raising and falling time for the XOR (which is something like 20ns/V)...I personally don't like this solution. Do you think it is ok?
 

TeeKay6

Joined Apr 20, 2019
531
That's clearly the case :p

I still think that if the two channels had had the same delay time it wouldn't have been a problem, as long as the delay is smaller than the driving oscillations (around 10kHz). My rational for that is that if we add to both channels the same delay both the outputs would be delayed of the same quantity but the delay of the second waveform with respect to the first would still be constant. But unfortunately I made the mistake of considering the delay for both channels to be somewhat matched.

We don't know yet. That will depend on the specific application of the sensor we are developing which is still not completely clear. But I'll keep that in mind

This is actually brings me to the next question. I added the analog comparator because I wanted to match the specification for rising and falling (especially for the discharging capacitor) edges for the input of the digital XOR in the next stage (to avoid undefined states in the transitions). I quickly tried to bypass the comparator and wired Vin1 and Vin2 (as in the schematic) directly to the input of the XOR. By doing that it works, but I'm definitely not matching the input raising and falling time for the XOR (which is something like 20ns/V)...I personally don't like this solution. Do you think it is ok?
You have not yet stated what accuracy you need in the measurement. ±1ps? ±1ns? ±1us? ±5us?
@Vinnie90
You also have not told us what range of capacitance you will attempt to measure.
 
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TeeKay6

Joined Apr 20, 2019
531
You have not yet stated what accuracy you need in the measurement. ±1ps? ±1ns? ±1us? ±5us?
@Vinnie90
Referring to your first scope image. You show rising voltage values, that I interpret to mean the cap-under-test (CUT) is being charged. That is not a good measurement condition for the schematic you have shown because charging of the CUT is affected by the 100Ω resistor, the 1N4148 forward conduction characteristics, and the inductive characteristics of the wires that carry the charging current. A better condition would be to measure the fall profile (the discharge profile) as you stated that you would be doing (and I assume you would let charging continue until the CUT was quite well charged). The 1N4148 is likely just fine, but there are likely even faster and lower capacitance and lower stored-charge diodes available. Of course R1 must have very low inductance. Also, the charging voltage, V1, must be stable and accurately known since the measurement scheme is sensitive to both the CUT start voltage and the comparator reference voltage. A ratiometric scheme (in which the ref voltage is derived from the charging voltage) might reduce some errors.
 

Thread Starter

Vinnie90

Joined Jul 7, 2016
86
You have not yet stated what accuracy you need in the measurement. ±1ps? ±1ns? ±1us? ±5us?
The minimum I can resolve should be one counter count. With a clock of 10MHz that should be 100ns. The accuracy in capacitance change is a spec that I don't have (it's always hard for an engineer get the specs from the physicists :p), so I targeted around 10pF (rounghly the 0.3% of the total capacitance value)

You also have not told us what range of capacitance you will attempt to measure.
The change in capacitance should go somewhere between the 500pF and 3.5nF
A better condition would be to measure the fall profile (the discharge profile) as you stated that you would be doing (and I assume you would let charging continue until the CUT was quite well charged)
Totally agree. In fact, I want to measure the falling profile of the CUT and the circuit works fairly well in doing that. The problem is that the time delay at the rising edges is giving me a pulse at the XOR that enables the counter giving me additional counting.

charging of the CUT is affected by the 100Ω resistor, the 1N4148 forward conduction characteristics, and the inductive characteristics of the wires that carry the charging current
This is exactly why there is a time delay between the two signals. I had a limiting resistor to limit the maximum current through D1 but that slowed down the rising edge. I have replaced the 100Ω resistor with a 10Ω first and then with a 1Ω. The situation has improved but I still have a couple of hundreds of ns of delay. I guess the best way to avoid it is to have a diode with faster switching time (maybe a schottky?) and match as much as I can the traces of Vin1 and Vin2.

I'm definitely not matching the input raising and falling time for the XOR (which is something like 20ns/V)
Do you think I can just bypass the comparator and feed the two signals directly into the XOR even if they don't match the XOR specs?
 

TeeKay6

Joined Apr 20, 2019
531
The minimum I can resolve should be one counter count. With a clock of 10MHz that should be 100ns. The accuracy in capacitance change is a spec that I don't have (it's always hard for an engineer get the specs from the physicists :p), so I targeted around 10pF (rounghly the 0.3% of the total capacitance value)







Totally agree. In fact, I want to measure the falling profile of the CUT and the circuit works fairly well in doing that. The problem is that the time delay at the rising edges is giving me a pulse at the XOR that enables the counter giving me additional counting.



This is exactly why there is a time delay between the two signals. I had a limiting resistor to limit the maximum current through D1 but that slowed down the rising edge. I have replaced the 100Ω resistor with a 10Ω first and then with a 1Ω. The situation has improved but I still have a couple of hundreds of ns of delay. I guess the best way to avoid it is to have a diode with faster switching time (maybe a schottky?) and match as much as I can the traces of Vin1 and Vin2.



Do you think I can just bypass the comparator and feed the two signals directly into the XOR even if they don't match the XOR specs?
@Vinnie90
Thanks for the additional info. Still more needed:
*Temperature range over which accuracy is maintained?
*Are any adjustments during manufacture allowed? For example, potentiometers, cap trimmers.
*Just how low must be the total current (or power) drawn during a measurement cycle? There are many faster comparators that also drain more supply current during operation.
*Will the test cycle (charge, discharge, measure, reset) be under control of a microcontroller?
*Are multiple full-scale CUT ranges possible? For example, ranges of 500-1000pF, 1000pF-2000pF, 2000pF-4000pF?
*How frequently must a measurement be made? Every 500us? 1ms? 10ms? 100ms? 1s? Your counter is given as 12-bit (4096 counts full-scale) at 100ns/count, for a max full scale (4nF?) count taking ~410us.

A Schottky diode is likely not feasible as Schottky's have large leakage currents. However, a search might be warranted as the forward current may not need to be large (if enough time is available for charging). This highlights that one issue in making the CUT measurement is keeping the effects of input bias currents (for comparators & opamps) and discharge leakage currents small in relation to the CUT's discharge current (that begins at about 400-500uA and decreases to about 10% of that at a 400mV discharge level). Can you be assured that the CUT will have a self-leakage current small enough to allow the measurement accuracy that you seek? Over RH and temperature variations?

Driving a CMOS gate (e.g. XOR) directly from the CUT is problematic due to the gate-to-gate/device-to-device variation in threshold voltage, temperature sensitivity of the gate threshold voltage, as well as temperature sensitivity of the gate input leakage current. Hence the need to know over what temperature range the circuit must operate "to spec". It may be that a more complex circuit than you have anticipated will be needed to meet your operating goals.

Yes, I have offered many questions but few solutions thus far. :)
 

Thread Starter

Vinnie90

Joined Jul 7, 2016
86
*Temperature range over which accuracy is maintained?
Right now we are targeting something around 0 and 100 degree Celsius. A point of notice is that the read out won't be anywhere close to the heat source. So maybe temperature right now is not of great concern.
Are any adjustments during manufacture allowed? For example, potentiometers, cap trimmers.
Definitely yes. I'm still in the design and prototyping phase so adjustments (small and big) are allowed :D
Just how low must be the total current (or power) drawn during a measurement cycle? There are many faster comparators that also drain more supply current during operation.
After some thoughts we have decided to leave the low power consumption to a next design stage. So right now power is not an issue.
Will the test cycle (charge, discharge, measure, reset) be under control of a microcontroller?
Yes! the uC will take care of the synchronization between signals, clear signals, and external communication with the user vua USB.
Are multiple full-scale CUT ranges possible? For example, ranges of 500-1000pF, 1000pF-2000pF, 2000pF-4000pF?
The capacitance depends on the geometry of the device. There's some room for adjustment but in the same order of magnitude (hundreds of pico Farads to couple of nano Farads
How frequently must a measurement be made? Every 500us? 1ms? 10ms? 100ms? 1s? Your counter is given as 12-bit (4096 counts full-scale) at 100ns/count, for a max full scale (4nF?) count taking ~410us
Also about burst measurement we have decided that if needed will be implemented in the next stage of the project. I have decided to go for this design that could be implemented also with a CPLD to allow more flexibility.

Maybe a note on the overall design. This is not an industrial or consumer design. It's more for research purposes and therefore the requirements can be less stringent (good for me :D).

It may be that a more complex circuit than you have anticipated will be needed to meet your operating goals.
Agree! But I need to see how our "sensor" behaves before changing something in the design.

Yes, I have offered many questions but few solutions thus far.
Well, questions are the first step to improve...they are always welcome (especially when they are extremely on the point :D )
 

SteveSh

Joined Nov 5, 2019
104
This has been rattling around in the back of my mind for the past couple of days.

What if you charge your unknown capacitor with a constant current, and compare the voltage across the cap to a known reference with a comparator? If you start your counter with the cap voltage at 0V, apply the constant current, and latch the count when the cap voltage reaches some value, call it Vth, the count would be related to the cap value.
C=I(dV/dt).
If I and dV are known and fixed, and you measure dt with your counter, then you can calculate the value of C.
 

Thread Starter

Vinnie90

Joined Jul 7, 2016
86
This has been rattling around in the back of my mind for the past couple of days.

What if you charge your unknown capacitor with a constant current, and compare the voltage across the cap to a known reference with a comparator? If you start your counter with the cap voltage at 0V, apply the constant current, and latch the count when the cap voltage reaches some value, call it Vth, the count would be related to the cap value.
C=I(dV/dt).
If I and dV are known and fixed, and you measure dt with your counter, then you can calculate the value of C.
This is definitely an option and I believe it is implemented in multiple designs (like charge pumps for PLLs). I didn't go for that for two reasons:
- I don't exactly need to know the value of the capacitance (we will calibrate the sensor in a following stage). So having a voltage source charging the capacitor should be ok
- In my experience designing good current source is definitely more complex than designing a voltage source :D

I might be wrong but I just liked the idea of the discharging time rather than measuring the charging time
 

SteveSh

Joined Nov 5, 2019
104
- In my experience designing good current source is definitely more complex than designing a voltage source :D
All depends on the accuracy/stability you need. Here are several options:
1. Constant current diode
2. A zener, bipolar transistor, and a couple of resistors
3. A Howland current source. This needs a voltage reference, a handful of resistors (4 of which should be matched), and a plain vanilla op amp.

I might be wrong but I just liked the idea of the discharging time rather than measuring the charging time
What you've described is a lot like a dual slope ADC.

https://www.electronics-tutorial.net/analog-integrated-circuits/data-converters/dual-slope-type-adc/
 
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