I'm in the process of drawing a circuit, working on delays, but I'm stuck.
What is the difference between these two delays? I have been searching for a while, and have not found an answer yet.
Is it the same?

 

I'm in the process of drawing a circuit, working on delays, but I'm stuck.
What is the difference between these two delays? I have been searching for a while, and have not found an answer yet.
Is it the same?

The exact meaning meant by a specific person in a specific passage sometimes have to be determined from the context of use.

But, generally speaking, the propagation delay is the amount of time it takes a single to travel some path from one point to another. Gate delay, on the other hand, is more commonly use to refer to the propagation delay from the input of a gate to the output of that same gate.

So a signal's propagation from source to destination may be composed of many gate delays (the delays of all the gates the signal goes through) plus additional delays due to routing distance and parasitics.

 

NS / Ti timing Pg. 34 http://www.ti.com/lit/ml/slyy153/slyy153.pdf ... http://www.ti.com/lit/an/szza036c/szza036c.pdf?&ts=1589138607578

https://www.eeweb.com/profile/elizabeth-simon/articles/how-to-read-data-sheets-logic-timing

Fairchild / ON Semi (partial) https://www.onsemi.com/pub/Collateral/AN-317.pdf.pdf

((( Dallas Semi / Max-Im . . . ? https://www.maximintegrated.com/en/design/technical-documents/tutorials/4/4429.html . . . https://www.maximintegrated.com/en/design/technical-documents/app-notes/3/3821.html . . . )))
_____________________________

trivia reminder : the tPLH tPHL are different !!! . . . ? http://web.mit.edu/6.012/www/SP07-L13.pdf

. . . . finally some list https://www.nxp.com/docs/en/application-note/AN11733.pdf

 

NS / Ti timing Pg. 34 http://www.ti.com/lit/ml/slyy153/slyy153.pdf ... http://www.ti.com/lit/an/szza036c/szza036c.pdf?&ts=1589138607578

https://www.eeweb.com/profile/elizabeth-simon/articles/how-to-read-data-sheets-logic-timing

Fairchild / ON Semi (partial) https://www.onsemi.com/pub/Collateral/AN-317.pdf.pdf

((( Dallas Semi / Max-Im . . . ? https://www.maximintegrated.com/en/design/technical-documents/tutorials/4/4429.html . . . https://www.maximintegrated.com/en/design/technical-documents/app-notes/3/3821.html . . . )))
_____________________________

trivia reminder : the tPLH tPHL are different !!! . . . ? http://web.mit.edu/6.012/www/SP07-L13.pdf

. . . . finally some list https://www.nxp.com/docs/en/application-note/AN11733.pdf

Thanks, I've got plenty of source of Propagation, but I just can't find for the gate delays.

 

never heard of gate delay - you could email to the author of your source
or trust Google https://www.google.com/search?client=firefox-b-d&q="gate+delay"

 

Gate delays are used all the time in digital electronics. A classical design is a reset/synchronization/edge-detection signal in synchronous logic


The physical device gate delays (with interconnect point to point propagation delays) for the three inverters are added for a signal total propagation delay equal to the width of the output pulse.

 

A gate delay is a type of propagation delay.
An RC network makes a delay ,that is a propagation delay.
A length of wire has a propagation delay
a light beam has a propagation delay,

gate delay just specifies that a gate is being used to make the delay,

 

The circuit board design gate delay solid-state physics model is used when we have 'slow' (as compared to the propagation delay of an EM signal in X length transmission line) devices.
Inside sub-micron technology the wire-delay electrical wave model is also used when it becomes a significant factor when designing on die interconnects.
Light travels ~one foot in one nanosecond, that would be a huge equivalent sized low-power Schottky TTL device with a 10ns solid-state physics delay modeled using electrical wave delays.