# Problem with high and low of 555 astable timer

Joined Oct 25, 2020
12
Hello.
I just wanted to give a brief introduction of the type and purpose of my circuit.
The circuit is designed to turn on (go high) for a time determined by 0.693R1C1 and do this (go low) periodically after a time determined by 0.693R2C2.
I got this operational by using two diodes D1 and D2 on the to block the current for the normal operation of the the low state which was determined by 0.693(R1+R2)C2.
I got the circuit to function but the time I computed from the equation is about 40% off in both high and low states. The high time varies between 10-13 seconds and low is between 4mins 20seconds to 4mins 40 seconds.
This is my first time operating on such a circuit so I'm not to sure where to look to troubleshoot it. So far I've guessed that it was a faulty IC but this is about the 4th circuit that I've done with basically identical values. I've measured the capacitances of my capacitor and determined that those are not the fault. Any idea of what could be going wrong?
I have enclosed a circuit diagram of my circuit:

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#### Wolframore

Joined Jan 21, 2019
2,259
It’s because you have to adjust for the voltage drop across the diode.

#### crutschow

Joined Mar 14, 2008
26,994
Yes, the standard time formula assumes the resistors are connected to the supply voltage.
You have to change the formula to account for the diode forward voltage drop.

#### Tonyr1084

Joined Sep 24, 2015
5,862
I agree with posts #2 & 3. So my comment is regarding the resistors: What's their tolerance? 20%? 10%? 5%? 1%? With long timing periods those small percentages will add up and have a huge effect on the performance of the circuitry.

#### alinatas

Joined Oct 25, 2020
9
your problem is D1.. D1 is churching the capacitor throught R1, diode has a dropping voltage of 0.7 volts,

#### Wolframore

Joined Jan 21, 2019
2,259
Much less than 0.7v due to the low current but it’s a start.

Joined Oct 25, 2020
12
Thanks for all the responses so far.
The tolerance was set to zero in the virtual conditions, but I'm working with 5% in actual conditions. In actual conditions, I measured the capacitance to be 924uF. Would sending a signal to the control PIN fix the voltage drop at the diodes? Or how would I go about accounting for them?

#### crutschow

Joined Mar 14, 2008
26,994
The tolerance was set to zero in the virtual conditions,
So what were the simulation times you measured?

Joined Oct 25, 2020
12
So what were the simulation times you measured?
I got 13 seconds for the high and 256 seconds for the low.

#### crutschow

Joined Mar 14, 2008
26,994
My LTspice simulation gave 9s for the high and 281s for the low (below).

#### crutschow

Joined Mar 14, 2008
26,994
Try lowering the cap to 100uf and increase the resistors 10X
If the capacitor leakage is proportional to its capacity, then that won't help.

#### sghioto

Joined Dec 31, 2017
2,333
If the capacitor leakage is proportional to its capacity, then that won't help.
I just realized that so deleted previous post. Was going to add that the 13 seconds does figure correctly for the initial time period.

Joined Oct 25, 2020
12
My LTspice simulation gave 9s for the high and 281s for the low (below).

View attachment 220653
Would you believe that I had changed the resistors because I was trying to experiment with the universal time constant formula. I used 9.84 kilohm and a 327 kilohm.
I'm using 252 uA for the current across the diode during discharge and 389 mA during charging. For the discharging I got approximately 0.05 V across the diode and 0.7 during charging. I got a closer value to the simulations using these in the universal time constant formula.

Joined Oct 25, 2020
12
If the capacitor leakage is proportional to its capacity, then that won't help.
Okay. Would that be why I read that you should not usually exceed 470 uF for the charge/discharge capacitor?

#### sghioto

Joined Dec 31, 2017
2,333
I'm using 252 uA for the current across the diode during discharge and 389 mA during charging
I think you mean 389 uA.

#### sghioto

Joined Dec 31, 2017
2,333
Okay. Would that be why I read that you should not usually exceed 470 uF for the charge/discharge capacitor?
It would depend on the quality of the capacitor.

#### crutschow

Joined Mar 14, 2008
26,994
For long time periods with a 555, it's better to use the CMOS version of the 555, along with large film or ceramic capacitors, to minimize the effects of leakage.

Joined Oct 25, 2020
12
I think you mean 389 uA.
I'm not sure what the current should be when the diode is forward biased. I saw those values across the charging resistor on Multisim and used it. Could you tell the proper way to determine the voltage across the diode? I just guessed that it was always 0.7 V.
Also, I'm not very familiar with the universal time constant formula either. I was mistakenly using 0.693RC for both charging and discharging. I read that it should look something like ln[(0.667Vcc-Vdiode)/(0.33Vcc-Vdiode)]. How do I make sense of that because I will need to in order to calculate the discharge equation.

Joined Oct 25, 2020
12
Maybe I'm taking the wrong approach to the help you have given. What I should be asking now is how to analyze the circuit so I will understand how any changes might influence it and the theory behind it.

#### sghioto

Joined Dec 31, 2017
2,333
I read that it should look something like ln[(0.667Vcc-Vdiode)/(0.33Vcc-Vdiode)]
I've seen that same equation. From another tutorial using your circuit they show t1 equal to appx. t1 = .8(R1C1)