problem when generating automatic testbench in active hdl 10.1(solved)

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tia2017

Joined Mar 23, 2017
23
hi i am designed a multiplexer with active hdl 10.1 and after i compiled and simulated the program successfully. now i want to write an automatic testbench.i can generate the testbench but its incomplete and doesn't have wait sections. can anyone help me how to generate the testbench completely with these wait sections? i attached the codes below
 

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Thread Starter

tia2017

Joined Mar 23, 2017
23
i figured it out.my friend help me with that and i generated a complete test bench.after compiling and simulating you should select generate test bench as shown in the photo number 1 that i attached .then you click next. the next step is really important because this step was the reason i came across this problem in the first place.in this step you should choose test vectors from photo number 2 then click browse and select a file with asdb format as shown in photo number 3 then for two consecutive steps click next then as shown in photo 4 tick generate then click finish. i hope this was helpful to you.
 

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