This thread is a part of previous thread (link is here - https://forum.allaboutcircuits.com/threads/cant-run-mosfet-in-half-bridge-configuration.162417/ ).
I am facing problem in the output at load. I was able to run the mosfets in half bridge configuration, but there is a problem in simulating it in full bridge configuration. I am using LTspice for simulation.
I ran the simulation but it stuck at a particular time. Also if I am applying drain to source voltage as 400V, I must get the same at load, but the output does not go beyond 180V.
Uploading the schematic here.
MOSFETs I am using are C3M0030090K. I am uploading the symbol(nmos_TO247_4L.asy) and library file(C3M0030090K.lib) of the mosfet. Edit the .lib statement in schematic to the location where the provided library is downloaded.
The gate driver used is ACPL 337J. For SPICE model - https://www.broadcom.com/products/o...y-integrated-smart-gate-drives/acpl-337j-000e (go to .subckt statement- right click there and click create symbol.)

 

hi SS,
Is this design intended to be built as an actual project or is it just a design exercise.?
It also hangs up when I simulate it.

You have 25 individual voltage sources in the circuit, I would say it is not a viable design.

E