My lazy guy contribution.
But I'm still dying to understand @tindel 's compensation.

 

that's the only effective fix - you needed to do that because of too high of an open loop gain here.

With a teaching spirit, I respectfully disagree. This is a bit of a black art - and is simple to understand in concept, but is very hard to understand in practice because of all of the different concepts are so similar, but still so completely different.

Your comment is simply not true. The reason I reduced the resistor to 1k was to guarantee my desired phase margin and that no weird phase shifts would happening in the open loop - which could result in marginal or conditional stability. The circuit operates beautifully with the 1k resistor removed completely as well. Reducing the resistance was just the belt to go with the suspenders (coming from my background in high reliability circuits). The first image below shows that the circuit regulates well between 1 and 50V output with no load (with the exception of the lack of a proper startup circuit -- requiring the output caps to discharge into the 20kohm feedback circuit before the circuit is stable).

No load regulation:


In a feedback circuit you want the most open loop gain that you can get... the larger the open-loop gain is, the better the feedback circuit regulates. To demonstrate this - I have posted two images below. Both images are of the circuit outputting 50V and with no output load other than the 20k feedback line. The first is with my original compensation (from post #35). It shows the output regulation of a 50V output when a 2A load shuts off. The ringing is about 125mV peak to peak and about 10ms in duration. The second is with my improved compensation and more open-loop gain (from post #36). The ringing of the second image is about 20mV peak-to-peak and about 1ms in duration. Nearly a 10x improvement of both. This is the power of open-loop gain. The more [open-loop] gain and bandwidth, the better.

Good compensation:


Best compensation:


Reducing the always on load resistance does improve the ripple a bit - but only because it discharges the caps more quickly.

I will reiterate that the only thing that Richard failed to do properly was compensate the plant.

 

I agree that it is beneficial to reduce the gain of the OpAmp. The transfer function of the OpAmp no longer has a near vertical slope.

But I really didn't reduce the gain of the opamp all that much. :/

I've never worked with an op-amp with near vertical slope - what's that suppose to mean? All the one's I've used have had a slope of -20dB per decade. Maybe I'm misunderstanding your point/angle.

 

You made it sound to easy.

Thanks. I wish my boss thought so. When I'm at work I usually make it look real hard - usually because he's always pushing the limits of my knowledge!

But I'm still dying to understand @tindel 's compensation.

I thought I explained it pretty well... did you have questions? Per your request I've included the phase/gain simulation.

 

Thanks. I wish my boss thought so. When I'm at work I usually make it look real hard - usually because he's always pushing the limits of my knowledge!


I thought I explained it pretty well... did you have questions? Per your request I've included the phase/gain simulation.

I think you did explain it very well. I'm just a visual guy, so seeing the change in the plots will help (I think)
Actually what I'm trying to understand is why it wasn't stable without compensation. Is it because of the inversion?

 

I think you did explain it very well. I'm just a visual guy, so seeing the change in the plots will help (I think)
Actually what I'm trying to understand is why it wasn't stable without compensation. Is it because of the inversion?

It was because there was a pole at 6kHz which caused the open loop gain to fall at 40dB per decade (The pole of the opamp was the first 20dB per decade). Putting a zero on the opamp at 6kHz gives the circuit +20dB/dec above 6kHz, cancelling out the effect of the pole -20dB/dec above 6kHz from the plant. Esentially 20+-20=0.

 

It was because there was a pole at 6kHz which caused the open loop gain to fall at 40dB per decade (The pole of the opamp was the first 20dB per decade). Putting a zero on the opamp at 6kHz gives the circuit +20dB/dec above 6kHz, cancelling out the effect of the pole -20dB/dec above 6kHz from the plant. Esentially 20+-20=0.

So it could have been stable (just not as good) with the lead (c3)only?

 

So it could have been stable (just not as good) with the lead (c3)only?

I'm glad that you brought that up - and I'm pleased that at least one person is digging into this enough to make it worth my time . This is actually how I originally compensated the loop when I downloaded the file. I was just lazily trying something I thought might work - and it did. I solved all of Richard's problems in about 5 seconds. (I haven't had the heart to tell him that yet... so don't tell him.)

This is arguably a better way to compensate the loop because you have more open loop gain through a larger range of the frequency spectrum. By letting it fall at 20dB per decade from the op-amp then 40dB at 6k from the plant. Putting C3 in at about 60kHz(ish) then you get a pole there and you cross 0dB of gain with 20dB/dec slope! and 40deg of phase margin! And it only requires 1 part!

Although this is perhaps slightly better compensation... I wanted to display something that was a bit more familiar to people - and a simple -20dB/dec slope is much more familiar as a teaching moment.

Sounds like you 'get it'.

 

I'm glad that you brought that up - and I'm pleased that at least one person is digging into this enough to make it worth my time . This is actually how I originally compensated the loop when I downloaded the file. I was just lazily trying something I thought might work - and it did. I solved all of Richard's problems in about 5 seconds. (I haven't had the heart to tell him that yet... so don't tell him.)

This is arguably a better way to compensate the loop because you have more open loop gain through a larger range of the frequency spectrum. By letting it fall at 20dB per decade from the op-amp then 40dB at 6k from the plant. Putting C3 in at about 60kHz(ish) then you get a pole there and you cross 0dB of gain with 20dB/dec slope! and 40deg of phase margin! And it only requires 1 part!

Although this is perhaps slightly better compensation... I wanted to display something that was a bit more familiar to people - and a simple -20dB/dec slope is much more familiar as a teaching moment.

Sounds like you 'get it'.

View attachment 117378

Thanks for the help. It did help to be able to see the plots. Thanks again!
PS. Promise not to tell.

 

But I really didn't reduce the gain of the opamp all that much. :/

I've never worked with an op-amp with near vertical slope - what's that suppose to mean? All the one's I've used have had a slope of -20dB per decade. Maybe I'm misunderstanding your point/angle.

If you look at the open loop gain of the OpAmp from the datasheet it quotes a value of 8,000,000, or 8 V/μV. On a typically scaled graph of the open loop transfer function it is as close to vertical as it can be. If the difference between the two inputs is greater than 1.875 μV, the output will be at one rail or the other. It is essentially working as a comparator, and can be literally described as a bang-bang element.

It is true that the open loop element is contained within a loop but as we have seen that is not enough to tame it's behavior under all conditions of load and phase shift. This is a characteristic of systems with non linear elements embedded inside traditional feedback loops.

 

Here is an update on my progress with the bench power supply project. Here are my goals:
The power supply is designed to give 0 to 50 volts in two ranges with current limiting of from a few milliamps to 2 amps. The output voltage and current limit are set by potentiometers. A toggle switch selects the range. An analog meter is used to show the output voltage and current. A switch selects whether the meter shows volts or amps.

I already had prototype boards built so some changes had to be made. First, I reworked the analog regulator using what @tindel recommended for frequency compensation. I did have to make one change to the compensation. I increased the feedback cap on the op-amp to 2700 pF from 150 pF. This was because of the way I am selecting the output voltage range. When the low range -- 0 to 5 volts-- is selected, the regulator is running at a voltage gain of 1 instead of 10. In addition, the circuit already had a 10k resistor instead of tindel's 18k. Preliminary results look good. I have not had a chance to test the full circuit under combinations of output voltage, current and load conditions.


Here are pictures of parts of the 50 volt, 2 amp bench power supply.


The top board is a switching pre-regulator. It takes up to 90 volts and reduces it to a manageable voltage for the analog regulator.
The board with the large heat sink is the analog regulator that had frequency compensation problems. The power MOS-FET is on the large heat sink.



This is a closeup of the pre-regulator.



This is a closeup of the analog regulator.

Pictures when they become available:
A board with the rectifiers and filter caps.
The components on the front panel on cables that plug onto the connectors on the analog regulator board.
The front panel is made by Laser printing on card stock.


Some notes on the schematic I have attached... It is a schematic of the entire power supply.

At the top left of the schematic is the transformer, rectifiers and filter caps that produce the unregulated voltage.
The rest of the top half of the schematic is the switching power supply pre-regulator.

The bottom half is the analog regulator that makes a clean, stable output voltage.
There are two 16 volt Zener regulated supplies. One is referenced to the unregulated voltage and is used to power the control circuits of the pre-regulator. The other is referenced to ground and powers the low power portions of the analog regulator.
The switching supply output tracks the analog output plus about 8 volts.

There is a circuit to indicate when the high voltage range is selected.
The meter shows either voltage (0 to 5 vollts or 0 to 50 volts or current (0 to 2 amps).

There are a number of diodes (signal, power and Zener) that are used to protect the circuitry from damage caused by fault conditions on the output such as large charged capacitors or batteries of either polarity.

 

my original compensation

what do you think the "compensation" does? it is a form of local negative feedback -> it reduces the open loop gain.

vs. the approach of lower resistor, the capacitance worsens the amplifier's dynamic performance -> in this case making it more likely to ring.

High open loop gain is good for DC performance, but deadly for AC performance.

Newbies don't do an ac analysis when they are designing a dc amplifier -> only be faced with a wildly oscillating circuit.

 

This is a bit of a black art

a black art that's well understood.

 

a black art that's well understood.

But not evidently by you.
The sim files are here for you to see. I think you know how. Why do you not look at them?
@RichardO, keep it coming!

 

But not evidently by you.

Easy there... let's keep this civil - and let's keep learning. I know I've been learning a lot.

I'm about to eat a big slice of humble pie...

@dannyf was right. I certainly did compensate the load at max voltage, max current. The problem (as Danny correctly points out) comes when trying to compensate over all load and output voltage conditions. If you remove the load in the circuit I proposed earlier there ends up being inadequate phase shift at the 20dB crossover point (Earlier I lost fact of the sight that the gain was 10 - A simple oversight on my part).

All of this stems from a massive bandwidth change of the plant over load conditions. (the bottom plot plane). To a lesser effect, the change in gain with setpoint voltage.


Here is a correction to my compensation method. I started by increasing the feedback capacitors significantly to reduce the open-loop gain over the entire load range, with a 1kohm minimum load. This works, but leaves little open loop bandwidth at high voltage, high current, causing poor regulation at higher frequencies. Ugh. I then added C4 to get a gain boost above 5Hz or so. This squeaks out a bit more open loop bandwidth so regulation is a bit better. Because of the added gain boost, the circuit is much less dependant on load variations, meaning that 20kohm is adequate as a minimum load so the 1k resistor is not needed. However, open loop bandwidth does improve with increasing minimum load.


I owe @dannyf a apology for my bigheadedness and stupidity for not listening to what he was trying to tell me. Sorry about that - I'll try to listen (errrr. read) better next time around.

Consider my pie eaten.

 

Here is a correction to my compensation method. I started by increasing the feedback capacitors significantly to reduce the open-loop gain over the entire load range, with a 1kohm minimum load. This works, but leaves little open loop bandwidth at high voltage, high current, causing poor regulation at higher frequencies. Ugh. I then added C4 to get a gain boost above 5Hz or so. This squeaks out a bit more open loop bandwidth so regulation is a bit better. Because of the added gain boost, the circuit is much less dependant on load variations, meaning that 20kohm is adequate as a minimum load so the 1k resistor is not needed. However, open loop bandwidth does improve with increasing minimum load.
View attachment 117713

I owe @dannyf a apology for my bigheadedness and stupidity for not listening to what he was trying to tell me. Sorry about that - I'll try to listen (errrr. read) better next time around.

Consider my pie eaten.

I have been working on the power supply off and on for a while...

Here is what has happened. Lots of circuit changes including:
Using tindel's compensation values.

A TIP122 and MPSA42 replace the MOS-FET in the analog regulator. This has the advantage of lower dropout voltage and less nastiness caused by the MOS-FET gate capacitance in combination with the 10k resistor.

A cap was added so that when the range switch is changed from 50 volts to 5 volts there is still an ac path for the feedback compensation cap.

I printed and attached the front panel graphics and mounted the meter, switches and pots on the front panel.

Fixed the high side Zener voltage regulator after blowing up the Zener. This was caused by an #$%^&* where I connected one scope ground clip to the low side ground and the other ground ground clip to the high side ground. Pow!

Found out why the meter did not work. It worked before I did the modifications. It was caused by a jumper that wasn't. (I had missed soldering one end of the jumper when I moved it.)

It is not completely done but it is getting close to what it will look like outside of the case. Finally, the circuit is mechanically stable so I can work on it without breaking it.

I am still having oscillation problems. I am beginning to think that the oscillation is partly caused by the interaction between the switching pre-regulator and the analog regulator. However, I also think there is still instability in the analog regulator. I can now try the circuit with different ac and DC loads and see what happens. The sawtooth oscillation seems to be worst with an output voltage of a volt or 2. It is about 1/2 volt peak to peak.

Even when the oscillation is small, there are glitches on the DC. This may be coming from poor ground paths (ground loops) either in the switcher circuit or between it and the analog regulator. I need to do an eyeball inspection of the grounding and see if I can spot an oops somewhere.

Lots of other small changes that I can't remember right now.


Here is a picture of the front panel. (Pic's a bit dark but you will get the idea.)



I will post more pictures when it is ready to go into the case. You will really like the transformer. It is a beast capable of about 175 watts.

 

Easy there... let's keep this civil - and let's keep learning. I know I've been learning a lot.

I'm about to eat a big slice of humble pie...

@dannyf was right. I certainly did compensate the load at max voltage, max current. The problem (as Danny correctly points out) comes when trying to compensate over all load and output voltage conditions. If you remove the load in the circuit I proposed earlier there ends up being inadequate phase shift at the 20dB crossover point (Earlier I lost fact of the sight that the gain was 10 - A simple oversight on my part).

All of this stems from a massive bandwidth change of the plant over load conditions. (the bottom plot plane). To a lesser effect, the change in gain with setpoint voltage.
View attachment 117711

Here is a correction to my compensation method. I started by increasing the feedback capacitors significantly to reduce the open-loop gain over the entire load range, with a 1kohm minimum load. This works, but leaves little open loop bandwidth at high voltage, high current, causing poor regulation at higher frequencies. Ugh. I then added C4 to get a gain boost above 5Hz or so. This squeaks out a bit more open loop bandwidth so regulation is a bit better. Because of the added gain boost, the circuit is much less dependant on load variations, meaning that 20kohm is adequate as a minimum load so the 1k resistor is not needed. However, open loop bandwidth does improve with increasing minimum load.
View attachment 117713

I owe @dannyf a apology for my bigheadedness and stupidity for not listening to what he was trying to tell me. Sorry about that - I'll try to listen (errrr. read) better next time around.

Consider my pie eaten.

Add me to the list. I get impatient with Danny's one liners so I often ignore them.

 

@tindel @Papabravo @ronv @crutschow
Hello all. It has been a while. I am still working on the power supply whenever I have some modicum of insight. Here is the latest:

I am still fighting oscillations. Even the current limiting circuit wants to oscillate! I have built that circuit dozens of times and never had it oscillate. I am not sure what is unique here. The oscillation is caused by the current limit kicking in (duh!). I added a 150 pF cap from base to collector of the sense/feedback transistor and that seems to help enough to let me try killing the other oscillations in the main loop.

Arrrgh. I can't believe I put a Zener diode at the summing point of an op-amp! The Zener and a Bat-46 Schottky diode are used to protect the op-amp input from fault conditions.

The Zener diode can have as much as 50 pF at 5 volts of reverse bias, 70 pF at 1 volts of reverse bias and a whopping 120 pF capacitance at zero volts bias!!! This, with the 20K feedback resistor, can cause a phase shift in the feedback 45 deg. at only 70 KHz. Since the capacitance is voltage dependent the oscillation varies with the power 's output voltage setting.

A signal diode, such as a 1N4148, in series with the Zener reduces the equivalent capacitance to a few pF. Even the BAT-46 has a fair amount of capacitance at 0 volts bias (10pF)... I have some SMD BAS70-4's that have less than 2pF of capacitance that I might kludge into the circuit. They are dual diodes so I can use one of them in series with the Zener and the other in parallel.

That's all for now. I will keep you informed about ongoing progress no matter how long it takes.


p.s. I found the attached application note and am hoping that its troubleshooting technique will help me work through the oscillation problems.