It is a JK flip-flop, but I have no idea what it would actually do in a circuit... Possibly drive the output/input in some forced way? -> When bot J and K are 1, Q would toggle, but then J and K would toggle...?

 

The answer to you question is simple. The problem is that your drawing is not a good question.

1. As shown, the circuit will do nothing because there is no clock input.

2. The short signal line going off the left edge of the image implies that there is an external signal source driving it. That is a conflict with the Q output driving it, so even if there were a clock input the circuit's operation would depend on which of two sources overpowered the other. That kind of source conflict usually ends in device failure.

3. The J-K flip-flop is defined with both inputs having the same logic polarity. Your drawing shows an inverted K input, which is not available as a purchased component. If you mean that there is an inverter between the Q output and the K input, draw that. If you mean something different, draw that.

Fix the drawing, go to Wikipedia, get the answer.

ak

 

It's a JK latch, not a flip flop. As connected, it's useless.

It will be reset when power is applied and then do nothing.

 

It will be reset when power is applied and then do nothing.

Sounds like most of my circuits.

 

It is not my drawing, it was given to me and it seemed wrong, as you stated, so I wanted to ask other people to see if I'm missing something

 

As far as I know, the inverted input at K means that the reset is active low, but who knows... As I said in my previous comment, it was given to me, I was just hoping that other people would be able to make some sense of it.

 

K is not the reset input, it is the K input. Usually the reset input is in the center of the bottom side, marked R. This input can have an inverting bubble or not.

ak

 

There are some FFs (such as the 74109 and 74276) that have an inverted K input so that you can connect the J/K together and it will act as a D FF.
The OP's circuit could then act as a toggle with a clock input if the J/K inputs were connected to the /Q output.

 

It's a JK latch, not a flip flop. As connected, it's useless.
View attachment 88561
It will be reset when power is applied and then do nothing.

I once had an interesting morning with a design engineerning manager who shared the same opinion despite my frequent question of "but what MAKES the circuit reset?" After several rounds of this he stormed off to get one of his staff to back his opinion.

To his dismay his minion's first question to him was "but what MAKES the circuit reset?"

 

As far as I know, the inverted input at K means that the reset is active low, but who knows... As I said in my previous comment, it was given to me, I was just hoping that other people would be able to make some sense of it.

I took the bubble on the K input to mean that it was LOW active instead of the typical HIGH.

Still not likely to be a useful circuit because J would have to be driven by something and having the Q output connected to J could create a conflict.

 

I once had an interesting morning with a design engineerning manager who shared the same opinion despite my frequent question of "but what MAKES the circuit reset?" After several rounds of this he stormed off to get one of his staff to back his opinion.

You're right, I didn't take the invert on K into consideration when Q initialized HIGH; that's what I get for trying to do it without drawing a truth table... The circuit has a 50/50 chance of initializing to LOW or HIGH. In either case, equally useless.

A JK latch would initialize to LOW with Q tied to both inputs...