I see the real circuit is much more complicated than this. However, I am still confused with the charateristic of this opamp.
When postive input (Vp) equals negative input (Vn), what is the output of opamp Vcc or -Vcc?
Aslo for the Vin-Vout characteristic above, is the arrow direction important? Is it possible that when Vin decreases from infinity, Vout will cross at VH instead of VL? And the same for Vin increases from negative infinity Vout will cross at VL instead of VH?
In that case we still have the same shape but different arrow direction.

For this circuit, Vin = (-R1/R2)*Vout. When Vin decreases from infinity, to calculate for the toggle point, why do we choose (-R1/R2)*Vcc instead of (-R1/R2)*(-Vcc) which is posive?

Back to the original circuit:



And then calculate for Vn, Vp:



And solves for the value of V1 at which Vn = Vp, let's call it Vh:



I think Vh is the hysteresis value of this circuit but it is not easy to see how Vh decreases as R5 increases.

 

Hello again,

When the input vp is equal to the input vn the output is zero because the difference of the inputs is zero. However, even 1 atto volt more in the same direction, and we see the voltage of the output change drastically because of the infinite gain. So we solve for zero, knowing that it will be very slightly different than zero in the real application anyway.

With R2=2*R1 we have:
VA=Vout/3+Vin*2/3

and so with +12v in and +12v out, VA is +12v. That keeps the output high at +12v.

Now when Vin comes down to +6v we have:
VA=8v

which still keeps the output at +12v.
When Vin comes down more, to 0v, we have:
VA=4v

still keeping Vout at +12v.

When Vin comes down to -3v we have:
VA=2v

still keeping Vout at +12v.

When Vin comes down to -5v we have:
VA=2/3 volts

still keeping the output at +12v.

Now when Vin comes down to -5.99v we have:
VA=+0.006667 volts

and with infinite gain the output is still at +12v.

Finally, when Vin comes down to -6.00v we have:
VA=0v

and now if we want to think about what happens next, the output goes down to zero volts, but if we just reduce Vin by 1uv it comes down to -6.000001v and we get:
VA=-6.66667e-7 volts

and now VA is less than the ground at the other input terminal, so with the infinite gain assumption again the output shoots down to the negative rail which is -12v, so know we have:
VA=-8.000000666666667 volts (approximately -8v)

and so now we have the output stuck at -12v until Vin changes again.

So when we think of the way this works, we think of VA going THROUGH zero not really getting stuck at zero, which would force a zero output, but even a tiny difference in the same direction forces a change of output state.
In the presence of noise, the output switches state and then HOLDS the state because the same Vin can not cause another change of state because it would have to change a lot to do that, and in this case it would have to go back up to +6v all the way from -6v and that's the reason we use hysteresis.

Does that make sense?

 

Hi,
It all makes sense now.
VA=Vout/3+Vin*2/3
From this expression, at each Vin you assume the state of Vout and after that confirm whether the assumption is correct or not by checking VA.
I've got it now.

Back to the original circuit, do you have any comment relating to what I calculated in post #21 above?

 

Hi,
It all makes sense now.
VA=Vout/3+Vin*2/3
From this expression, at each Vin you assume the state of Vout and after that confirm whether the assumption is correct or not by checking VA.
I've got it now.

Back to the original circuit, do you have any comment relating to what I calculated in post #21 above?

Hello again,

Yes your results for Vn and Vp look correct, but i dont know what you are trying to do with "Vh".
What you say is that you find the value for V1 where Vn=Vp but then you still have V1 in the formula.
A formula that solves for V1 will not have V1 in it, but it will have V2 and Vo.
So we would see Vh on the left and some resistors and V2 and Vo on the right.

 

Hi,

I made mistake in the last post. The value Vh that I got above is V2 at which Vn = Vp.
I set Vn = Vp then solve for V1 or V2.


If I solve for V1:



If I solve for V2:




So which one would be the hysteresis value here?

 

Hi,

I made mistake in the last post. The value Vh that I got above is V2 at which Vn = Vp.
I set Vn = Vp then solve for V1 or V2.

View attachment 146109
If I solve for V1:

View attachment 146110

If I solve for V2:

View attachment 146111


So which one would be the hysteresis value here?

Hello again,

Well first, i dont think your V2 is correct. If you check your units on the left and right, on the left you have a voltage. On the right you have in the denominator three resistors multiplied together RRR and so on the top you need to have three RRR plus one voltage RRRV, but sometimes you have RRV and sometimes you have RRRV, so something is wrong there. Im sure you can correct it though.

I get this:
V2=(R2*R4*R5*V1+R2*R3*R5*V1+R2*R3*R4*V1+Vo*R1*R4*R5+Vo*R1*R3*R5-Vo*R2*R3*R4)/((R2+R1)*R4*R5)

which is almost the same as yours but you'll see RRRV in the top and RRR in the bottom, so RRRV/RRR=V which is the same as the left which is V. Remember RRRV+RRRV simplifies to RRRV in terms of units, but RRV+RRRV simplifies to V+RV which are not in the same units.

So anyway, the hysteresis voltage, assuming bistable operation, is the difference between V2's when we look at V2 rising and V2 falling and with the two assumed output states of +12 and -12.
So once you get the correct equation, you can insert Vo=+12 get a result, then insert Vo=-12 and get another result, then subtract. If we write V2 as a function:
V2=Vx(Vo)

then the hysteresis voltage is:
Vh=Vx(+12)-Vx(-12)

Keep in mind though that not all resistor values will produce a bistable result, and an infinite gain may force a linear result for many values of resistors, so you may have to limit the internal gain also to observe this in some simulators.

For example using the formula above, with R1=1k, R2=5k, R3=1k, R4=1k, R5=2k, and V1=1v, i get:
Vh=-2v

which is really just 2v.

That means at some point V2 reaches one value and the output state switches to the other state, then at some point where V2 is 2v above that (or below that depending on which way V2 is going) it switches to the opposite state.

Also note that for some resistor value we may see partial linear operation, where the output 'ramps' up with V2 and then tops out, then ramps down as V2 decreases. That also means there is no hysteresis to speak of.
To check this we probably have to solve for the output voltage where the overall gain allows an output that is greater than +12v and lower than -12v so we know it is pinning to the rails, and check the dVo/dV2 to see that a small input change can cause a large output change.
Note that if i change R2 to 3k we see the hysteresis disappear and the output ramp up somewhat with V2 ramping up. So the gain has to be high enough to allow proper bistable operation.
This means that R2 (in the above example) must be high enough to keep the linear range for V2 very low. In a normal application that means 5k probably is too low and maybe something like 7k would be better. We should probably look at this closer. We want the output to switch from +12 to -12 (or back) when V2 crosses the trip point, we dont want to see the output creep up slowly as V2 increases, for bistable operation anyway. A small window is probably ok though, like 1mv, but it depends on the overall operation with V1 also. I set V1=1v for the above examples.

So there is a little more work to do with this kind of circuit.

 

Hi,

Thanks for the derivation. I see the procedure now.
Actually, your expression and mine are exactly the same. Maybe parentheses make it hard to see. The last part of your post is not easy to grasp now. So I will focus on the first and then come back later.
I checked the your expression of V2 and mine and they agrees both symbolically and numerically.
To see how hysteresis depends on R5, I tried to substitute R1=1k, R2=5k, R3=1k, R4=1k, V1=1v , Vo = +/- 12 and keep R5 as a variable.
Here is what I got:



I plotted this and realize that hysteresis only decreases as R5 increases if R5 value is smaller than 2.5k. As R5 > 2.5k then hysteresis will increases with R5.



Are these observations correct? If so is there an intuitive explanation for this?

 

Hi,

Thanks for the derivation. I see the procedure now.
Actually, your expression and mine are exactly the same. Maybe parentheses make it hard to see. The last part of your post is not easy to grasp now. So I will focus on the first and then come back later.
I checked the your expression of V2 and mine and they agrees both symbolically and numerically.
To see how hysteresis depends on R5, I tried to substitute R1=1k, R2=5k, R3=1k, R4=1k, V1=1v , Vo = +/- 12 and keep R5 as a variable.
Here is what I got:

View attachment 146122

I plotted this and realize that hysteresis only decreases as R5 increases if R5 value is smaller than 2.5k. As R5 > 2.5k then hysteresis will increases with R5.

View attachment 146123

Are these observations correct? If so is there an intuitive explanation for this?

Hi,

Well yes, sort of. The intuitive part is that the expression only works if we are known to be in the bistable region. That means it would have to be checked to be sure.

To check, set Vout=12 and Vout=-12 as before.
Now if we have -12 on the output and we have V2=3v (just for example), then when Vout goes to +12v V2 should be LOWER than 3v because the idea of the hysteresis is to make it easier for the op amp to stay saturated, not harder. If V2 goes up, then it means that V2 must be higher to keep the device saturated and with V2 constant (slow changing V2) we dont get that. But if V2 goes down with that second calculation then the current V2 (which will be 3v for that 3v example only) is definitely high enough to keep it saturated, because the new value to keep it saturated will be LESS than the current V2 of 3v. If it is less than 3v by a large amount then we probably have nothing to worry about, but if it is less than 3v by a small amount (like 0.001v) then we might not like that because it could bounce up and down for a slow varying input V2.
So in short we should probably be working with a signed result and rejecting those that dont fit the sign requirement.

For example, with R2=5k and R5=10k, the device will be in the linear mode for a large part of the input range of -12 to +12 volts.
You might want to calculate that to see how that works. I think i got very approximately -1v to +5v where the output will ramp up.

Of course a good question at this point might be why do we want negative feedback if we want hysteresis. The only answer i think is that we want partly linear operation and only bistable for certain conditions. That's interesting, but i cant think of an application where we would want this right offhand maybe you can.

 

Hi,

I really have no idea what you are talking about in the last post.

To check, set Vout=12 and Vout=-12 as before.
Now if we have -12 on the output andwe have V2=3v (just for example), then when Vout goes to +12v V2 should be LOWER than 3v because the idea of the hysteresis is to make it easierfor the op amp to stay saturated, not harder.

Should V2 be a constant voltage source? Also why do we compare V2 but for different output voltage (+12V and -12V)?

 

Hi,

I really have no idea what you are talking about in the last post.

Should V2 be a constant voltage source? Also why do we compare V2 but for different output voltage (+12V and -12V)?

Hi,

Sorry i also meant to confirm your find that our equations where the same. I think what happened was i copied your formula into the software incorrectly. I've done this before too. The problem for me is bitmap formulas (graphic not text) where you have to physically look at the formula and type it back into the software program or text editor one char at a time, like "R5*R4.." and i dont have a good success rate at doing this
I am so used to text formulas, because you can copy and paste them right into the software you intend to use. So if you provide both a bitmap (graphic) formula nice and laid out as well as a text version (like R5*R4*V1 etc) then i can copy and paste and then verify faster and easier. The bitmap form is still nice to read though.
To put it another way, if i copy and paste your graphic formulas i'd have to have character recognition software to get it into text form, and we all know how bad that stuff works. If in text form, i can copy and paste and check in a few second with very high success rate.

Ok, back to the circuit at hand...

The main idea here is that we have to have an idea how the circuit works to begin with. For our examples that means running V2 from -12 to +12v and watching the output.

When we raise V2 from say -12 to -11, the output may or may not change due to two reasons. One is that it's linear already, and two it that it could be bistable. If it is linear, the output will change a little but if bistable, the output will jump up to +12v or not change at all. Our job is to find out what happens. We also would like to investigate what happens with change of R5.

Now we concentrate on the bistable mode. V2 is not a constant voltage. I assume we are trying to understand circuit operation from the standpoint of how it reacts to V2, so V2 cant be constant.
The way hysteresis works if it works at all is that when the output is -12v and V2 is going up, at some point the output starts to change and AS SOON as it starts to change it MUST increase the value at the non inverting input if we expect to see hysteresis do it's job, and that is to force the output to the +12v rail and keep it there, dispite small decreases in V2. We can do this a number of ways, one of which is to calculate vp and vn and see what is happening there. Another way is to make sure that IT WOULD TAKE a large change in V2 to stop the histeresis from working. That would mean that when V2 actually is constant (during a change of output) that would mean that only the output has influence over the circuit now, no longer V2, once it becomes some constant value and the hysteresis it working.

There are a number of ways to look at this, and so we try to find conditions that tell us what is happening. But if you dont seem to understand one or more of the ways we are looking at this, then we should turn to a simulator for help. It's no big deal we use them every day and we are certainly allowed to. That will give us a better idea what is actually happening and what we have to look for as well as what we have to calculate.
Remember, for you this is an investigation into the working of this circuit, in particular what happens with change of R5. So gaining a view on the basic operation first is not a bad idea and a simulator will help there. So if you will, let's turn to a simulator for a while and come back to the equations again later.

The first experiment should be what happens with R5 too big. That's a problem area so let's go there first.
Set up the simulator with all the assumed values:
R1=1k, R2=5k, R3=1k, R4=1k, R5=10k, V1=+1v,
and an op amp with power +12 and -12 hopefully rail to rail but dont worry about that too much just yet.
Set V2 to be a triangle, set to ramp up in say 1 second and down in 1 second, from -12 to +12 and back down to -12v. Graph the output voltage in the time domain, maybe tstep = max 10us.
Notice the output response does not look digital, it looks part linear and part digital.

If you like you can post the results here. I'll set my simulator up too for the same circuit.
From the observation of the output, what do you think about the output change and how the circuit is reacting to the change in V2?

In a linear circuit we get a linear output, in a digital circuit we get a combinatorial response. Because this circuit sometimes acts like either linear or digital, we should expect part linear and part combinatorial operation which means changing parts could change the behavior a lot, just like when changing gate types in a digital circuit. This means more work than the typical linear circuit and so probably more time to understand fully.

 

Hi Mr.Al,

I see the point of text formulas now. I will post it next time.
Now I think it is better to start with simulator as you suggested. I set up the simulation with aforementioned parameters. The amplifier is an idea component with infinite gain and bandwidth, +12 and -12 rail to rail.



I ploted Vout, Vtrig and Vp - Vn waveforms:



and the output part linear and part digital as you said.

From the observation of the output, what do you think about the output change and how the circuit is reacting to the change in V2?

When the magnitude of V2 exceeds some values then opamp goes into saturation.
I only see two extremes:
when Vtrig goes down to some value --> Vp is lower and smaller than Vn --> output change to -Vcc
when Vtrig goes up to some value--> Vp is higher and larger than Vn --> output change to +Vcc

somewhere in between, Vout still haven't changed its state and Vtrig causes Vp close to Vn and this is not enough to saturate the opamp.
(from the simulation, this range Vn = Vp all the time which is a bit strange)
Why Vn = Vp but the output voltage increases linearly?

 

Hi Mr.Al,

I see the point of text formulas now. I will post it next time.
Now I think it is better to start with simulator as you suggested. I set up the simulation with aforementioned parameters. The amplifier is an idea component with infinite gain and bandwidth, +12 and -12 rail to rail.

View attachment 146228

I ploted Vout, Vtrig and Vp - Vn waveforms:

View attachment 146229

and the output part linear and part digital as you said.



When the magnitude of V2 exceeds some values then opamp goes into saturation.
I only see two extremes:
when Vtrig goes down to some value --> Vp is lower and smaller than Vn --> output change to -Vcc
when Vtrig goes up to some value--> Vp is higher and larger than Vn --> output change to +Vcc

somewhere in between, Vout still haven't changed its state and Vtrig causes Vp close to Vn and this is not enough to saturate the opamp.
(from the simulation, this range Vn = Vp all the time which is a bit strange)
Why Vn = Vp but the output voltage increases linearly?

Hi,

Good idea to plot vp-vn also. When vp-vn is zero that means the output can keep the circuit in the linear mode of operation which means it's isnt saturated.

You see what is happening there?
Sometimes we just have a normal amplifier circuit that happens to saturate.
Other times we have an amplifier that saturates when V2 goes above (or below) a certain value.
The 'combinatorial' idea comes in because when we use certain combinations of resistors we get different operation. IN particular when we change R5 we possibly change the behavior (depending on value) from just an amplifier to a bistable latch.
Your job then i think is to find out what values of R5 will change the behavior so you know what to use for a given application.
For a linear amp where you use positive feedback you dont want bistable operation, but for a bistable comparator circuit you want hysteresis to force bistable operation.
Note that if you make R5=2k the circuit acts like a bistable comparator again (look at the output again and the vp and vn again).

 

Hi MrAl,

I changed R5 = 2k and there is no hysteresis at all.


I would like to derive the linear range in relation with R5 and the application of this.
Next week I have some projects to do so maybe I will have to delay one week.

 

Hi MrAl,

I changed R5 = 2k and there is no hysteresis at all.
View attachment 146302

I would like to derive the linear range in relation with R5 and the application of this.
Next week I have some projects to do so maybe I will have to delay one week.

Hi,

Something must be wrong, What simulator are you using? Mine shows bistable operatoin with R5=2k. We may have to both use the same simulator, that would be better, like LTSpice.
Edit: i see what is wrong now, your output goes to 150v and -150v. You can not allow that. You must make it clip at +12 and -12. If you allow an unclamped output voltage it will never go bistable because the output will always have the ability to force linear operation. By clamping the output, we limit the ability of the op amp to respond in the normal way and thus limit the linear range.

However, i have a simpler circuit we can use to investigate further.
Change R3 to R6 (so we both have the same enumeration) and remove R4 altogether.
Make R6=1k and make V2 the 'new' voltage source, we should probably call V4.
Now we energize the circuit with V1 as before but now V4 which is in the place where V2 is now but it is not V2 it is a new Thevenin source which will relate our new findings to the older circuit quite easily.
The right value for R6 would be 500 ohms for our previous circuit, but i want to change to 1k so that we can visualize the operation easier. With both R1 and R6 being 1k each, the circuit is easier to figure out.

The beauty of this new circuit is that we just have two regular voltage dividers now, both being fed with V1 and V4 and also with the output voltage Vo. That means it is easier to calculate when Vp=Vn.

See if that helps your outlook on the operation.

Here is a sim of the original circuit with R5=2k and outputs clamped to plus and minus 12v.
Also, the new circuit.

 

Hi MrAl,

I use PSIM. I think there was a problem with the simulation because when I ran it, there was a warning "disk space is not enough" and it took a very long time (10 minutes) to get the result.
I will need to clear some space after I get back and look at the new circuit. Thank you.

 

Hi MrAl,

I use PSIM. I think there was a problem with the simulation because when I ran it, there was a warning "disk space is not enough" and it took a very long time (10 minutes) to get the result.
I will need to clear some space after I get back and look at the new circuit. Thank you.

Hi again,

Oh ok, well make sure the output is clamped or make your own clamps or use a different model.

But anyway, the solution to the new circuit is easier to get to than the previous circuit. Solutions for Vp and Vn are easier to write.
It becomes clear that when we have an expression for Vp and Vn and force the output to -12, then solve for V4, then repeat with the known V4 but force the output to +12v, that Vp must be greater than Vn to ensure bistable operation. The reason of course is that both Vp and Vn change during the transition, and if Vp does not stay above Vn then it either does not switch at all or stays linear.

Just for the fun of it, if we place a 0.010v 100kHz sine source in series with the ramping V4, if we get any linear operation we can see the sine appear on the output while the device is in linear mode, and then the output pins to the rail once V4 ramps up enough.
When in the linear mode with the added sine source, we can see the output amplitude sine vs the input amplitude sine and get an idea of what the linear gain is.

But the most important point is that before the switch transition we get a voltage V4 where it starts to switch and that must be when Vp=Vn or Vp is slightly above Vn, and after the switch Vp must remain above Vn or else it doesnt stay in the next bistable mode (+12v on output).

Because i set up the circuit with equal resistors on the input (R1 and R6) that means both op amp inputs would respond the same if R2 and R5 where the same, so we know that is the crossover point where we start to change from bistable to linear. Somewhere before that though we get in between operation where we get linear for a short range of V4 and then the output saturates. We want instant saturation though if we can get it when we want purely bistable operation.

In the real world there will also be some slew rate. This will mean there will be a certain delay between the time that Vp just becomes greater than Vn and the output starts to change. That presents an interesting problem too, and also allows us to visualize what is taking place...first Vp goes higher than Vn, then the output starts to ramp up, then Vp ramps up faster than Vn so Vp stays higher than Vn (bistable operation). If Vn ramps up faster than Vp then it stays in linear operation or linear for a short range of V4 and then saturates for some range.

 

@MrAl: I read that OpAmp in PSIM doesn't support positive feedback. So I think that is the reason. I have LTspice but I only used it one or two times and not familiar with it. Maybe ow it is time for me to learn to use it too.
Could you send me your simulation in LTspice?

 

@MrAl: I read that OpAmp in PSIM doesn't support positive feedback. So I think that is the reason. I have LTspice but I only used it one or two times and not familiar with it. Maybe ow it is time for me to learn to use it too.
Could you send me your simulation in LTspice?

Hi,

I was using a different simulator, but i set up LT spice also now. Here is the asc file..
I set it up with a sine input source and that gives some interesting results.
I set both power supplies to 13v instead of 12v because apparently the op amp i used only goes to +12 on the output with +13 power supply, and ditto for -12 and -13..