HI. I am trying to design a CMOS Inverter. NMOS turns on and off as expected. However, PMOS does not fully turn off

 

To fully turn off the PMOS its gate voltage signal must be raised to the supply voltage so its Vgs = 0.

 

It works, but 40V is beyond max Vgs ratings for NMOS

 

It works, but 40V is beyond max Vgs ratings for NMOS

Yes, so you have to limit the Vgs to the max value for the MOSFET you are using.
You can use either a Zener or two resistors to form a voltage divider to the gate.

 

It winds up that driving the pair is quite a bit more complex than just gates in parallel