# PMOS current mirror - Small signal analysis - Why is Vsg = 0v?

#### KaiL

Joined Aug 30, 2014
69

The one in red box , why is Vsg2 = 0V?
Vsg2 = Vs - Vg --> Vs = 0 since it is ground but what about vg?

#### AlbertHall

Joined Jun 4, 2014
11,318
As the red writing by the red box says, it is at a fixed DC voltage and there can be no AC voltage there so it acts for AC signals the same as ground or Vdd.

#### KaiL

Joined Aug 30, 2014
69

Actually I still don't get it
I am trying to do a circuit analysis on the red box but I am not sure why it is 0 V for Vsg2
Vs=0 V since it is grounded but Vg isnt equal to Vout?
So Vs-Vg = Vsg2 --> Vsg = 0 - Vout???

Did I do it wrongly for analysis part?

#### AlbertHall

Joined Jun 4, 2014
11,318
You are thinking DC, but the red box is considering AC. There is zero signal voltage on the gate of the top FET.

#### Russmax

Joined Sep 3, 2015
82
Saying vsg2 = 0 means 2 things:
1) M3 and IREF can be replaced by a DC voltage source from source to gate of M2.
2) DC voltage sources are shorted for small-signal analysis.
Therefore, vsg2 = 0