Facebook
Google
GitHub
Linkedin
Usually one does not have on embedded processor ability to do locked freq multiplication.
PLL based.
Here is an custom component example done by a user, along with a DDS and rotary
encoder. A component is an onchip resource in PSOC. This used very small number
of chip resources. DDS another user creation, rotary encoder was part of the library
of standard components. All onchip.
Note this can pull jitter out of the input freq as another solution to crappy signals,
eg. reconstitute it with lower jitter, multiplied or not.
Example was motivated by user that needed to develop 60 Hz line locked triggers for
phase control. This particular setup is me playing with other frequency ranges and
jitter minimization settings. Setup was to multiply input freq by 16. The x 16 output
freq is delayed by ~ 20 nS. Caused by internal gate/flop delay in phase detector I think.
Phase/Freq detector/charge pump done with switched IDACs, source and sink.
Single chip solution. Resources, right hand window, show most chip resources still available
for other uses.
Only code necessary was 2 lines of code to start the DDS used as input source and
the PLL. Of course actual applications would probably do other stuff needing coding
for that.
Regards, Dana.
PLL based.
Here is an custom component example done by a user, along with a DDS and rotary
encoder. A component is an onchip resource in PSOC. This used very small number
of chip resources. DDS another user creation, rotary encoder was part of the library
of standard components. All onchip.
Note this can pull jitter out of the input freq as another solution to crappy signals,
eg. reconstitute it with lower jitter, multiplied or not.
Example was motivated by user that needed to develop 60 Hz line locked triggers for
phase control. This particular setup is me playing with other frequency ranges and
jitter minimization settings. Setup was to multiply input freq by 16. The x 16 output
freq is delayed by ~ 20 nS. Caused by internal gate/flop delay in phase detector I think.
Phase/Freq detector/charge pump done with switched IDACs, source and sink.
Single chip solution. Resources, right hand window, show most chip resources still available
for other uses.
Only code necessary was 2 lines of code to start the DDS used as input source and
the PLL. Of course actual applications would probably do other stuff needing coding
for that.
Regards, Dana.
Attachments
Last edited:
