PIN Diode conducting when reverse biased

Thread Starter

Sitara

Joined May 2, 2014
57
Hello!

Please refer to the attached schematic. My design objective is to alteratively connect either R3 or R5 to the 20 MHz AC signal source through R6. D1, D2 are NXP PIN diodes BAP63-02. The 12V DC bias voltage is applied at points A & B.

The problem I am experiencing is that when point A is at +12V and point B at 0V (the same ground as the AC signal), diode D1 is conducting. I know this because when I attach the scope probe to the junction of C1 & R3, I measure an AC voltage which is 1/3 in amplitude to that which I measure at the junction of C2 & R5, with R3 = R5 = 1K , despite the fact that D1 is reverse biased. Any insights would be highly appreciated! Thanks!

EDIT: I have also uploaded the BAP63-02 datasheet for your perusal.

EDIT2: Even though the schematic shows C1, C2 & C3 as 100uF, they are in fact 220nF.
 

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ebp

Joined Feb 8, 2018
2,332
Have you tried removing the diode that would be reverse biased altogether or at least lifted one end slightly so that you can check the signal amplitude with nothing but the stray capacitance of the circuit board?

Have you been careful to minimize the inductance in the C1 and R3 path? What type of capacitor is C1? Is there a reason the capacitance of C1 is so large? 10 nF will have a reactance of about 0.8 ohms at 20 MHz. That magnitude of capacitance gets you into C0G type caps which are better behaved at RF than higher-K ceramics.
 

Thread Starter

Sitara

Joined May 2, 2014
57
Have you tried removing the diode that would be reverse biased altogether or at least lifted one end slightly so that you can check the signal amplitude with nothing but the stray capacitance of the circuit board?

Have you been careful to minimize the inductance in the C1 and R3 path? What type of capacitor is C1? Is there a reason the capacitance of C1 is so large? 10 nF will have a reactance of about 0.8 ohms at 20 MHz. That magnitude of capacitance gets you into C0G type caps which are better behaved at RF than higher-K ceramics.
Hello, Merry Christmas & Happy New Year to you ebp!

Have you tried removing the diode that would be reverse biased altogether or at least lifted one end slightly so that you can check the signal
amplitude with nothing but the stray capacitance of the circuit board?


No, I have not. But what I did do was to set my DVM on Diode Check and measure the voltage drop across the reverse biased diode (and the other diode), in both directions, obtaining a voltage drop of 0.74V with the positive lead connected to the diode's anode and negative lead connected to its cathode. When I connected in the opposite direction I got a voltage drop of twice this (ie 1.48 V). This was exactly the case also with the other diode. In both cases the PCB was unpowered (neither AC nor DC voltages present).
EDIT: I remeasured this more carefully and the voltage drops were 0.785v and 1.468v
for both diodes.


Have you been careful to minimize the inductance in the C1 and R3 path?

C1 is a smd ceramic cap and R3 is a parallel combination of two through-hole carbon composite resistors (so as to give a constant true resistance over a wide frequency range with minimum parasitic inductance).

What type of capacitor is C1? Is there a reason the capacitance of C1 is so large? 10 nF will have a reactance of about 0.8 ohms at 20 MHz.

Here is a link to the vendor's page for the capacitor:

https://uk.rs-online.com/web/p/ceramic-multilayer-capacitors/3937668/?relevancy-data=636F3D3126696E3D4931384E525353746F636B4E756D626572266C753D656E266D6D3D6D61746368616C6C26706D3D5E2828282872737C5253295B205D3F293F285C647B337D5B5C2D5C735D3F5C647B332C347D5B705061415D3F29297C283235285C647B387D7C5C647B317D5C2D5C647B377D2929292426706F3D3126736E3D592673723D2673743D52535F53544F434B5F4E554D4245522677633D4E4F4E45267573743D33393337363638267374613D3339333736363826&searchHistory={"enabled":true}


The reason that the capacitor is so large is because I want to use the same setup to do measurements down to 200 KHz. Please view uploaded images PIN_Topside, PIN_Bottomside & PIN_Closeup to judge the inductance of the C1 R3 path, as well as the general layout.

EDIT: Just in case you spotted that R3 & R5 are NOT 1k each, I changed them since my 1st email! They are now respectively R3 = 22R || 22R = 11R and R5 = 680R || 680R = 340R. ALSO NOTE THAT R5 is INCORRECTLY LABELLED AS R6 in Image PIN_Bottomside.
 

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