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I also don't understand where is the problem
Are you sure code in post #220 confirm two way communication ?
Bash:
#define _XTAL_FREQ 8000000
// Configuration bits: selected in the GUI
// CONFIG1L
#pragma config RETEN = OFF // VREG Sleep Enable bit->Ultra low-power regulator is Disabled (Controlled by REGSLP bit)
#pragma config INTOSCSEL = HIGH // LF-INTOSC Low-power Enable bit->LF-INTOSC in High-power mode during Sleep
#pragma config SOSCSEL = DIG // SOSC Power Selection and mode Configuration bits->Digital (SCLKI) mode
#pragma config XINST = OFF // Extended Instruction Set->Disabled
// CONFIG1H
#pragma config FOSC = INTIO2 // Oscillator->Internal RC oscillator
#pragma config PLLCFG = OFF // PLL x4 Enable bit->Disabled
#pragma config FCMEN = OFF // Fail-Safe Clock Monitor->Disabled
#pragma config IESO = OFF // Internal External Oscillator Switch Over Mode->Disabled
// CONFIG2L
#pragma config PWRTEN = OFF // Power Up Timer->Disabled
#pragma config BOREN = SBORDIS // Brown Out Detect->Enabled in hardware, SBOREN disabled
#pragma config BORV = 3 // Brown-out Reset Voltage bits->1.8V
#pragma config BORPWR = ZPBORMV // BORMV Power level->ZPBORMV instead of BORMV is selected
// CONFIG2H
#pragma config WDTEN = OFF // Watchdog Timer->WDT disabled in hardware; SWDTEN bit disabled
#pragma config WDTPS = 1048576 // Watchdog Postscaler->1:1048576
// CONFIG3H
#pragma config CANMX = PORTB // ECAN Mux bit->ECAN TX and RX pins are located on RB2 and RB3, respectively
#pragma config MSSPMSK = MSK7 // MSSP address masking->7 Bit address masking mode
#pragma config MCLRE = ON // Master Clear Enable->MCLR Enabled, RE3 Disabled
// CONFIG4L
#pragma config STVREN = ON // Stack Overflow Reset->Enabled
#pragma config BBSIZ = BB2K // Boot Block Size->2K word Boot Block size
// CONFIG5L
#pragma config CP0 = OFF // Code Protect 00800-01FFF->Disabled
#pragma config CP1 = OFF // Code Protect 02000-03FFF->Disabled
#pragma config CP2 = OFF // Code Protect 04000-05FFF->Disabled
#pragma config CP3 = OFF // Code Protect 06000-07FFF->Disabled
// CONFIG5H
#pragma config CPB = OFF // Code Protect Boot->Disabled
#pragma config CPD = OFF // Data EE Read Protect->Disabled
// CONFIG6L
#pragma config WRT0 = OFF // Table Write Protect 00800-01FFF->Disabled
#pragma config WRT1 = OFF // Table Write Protect 02000-03FFF->Disabled
#pragma config WRT2 = OFF // Table Write Protect 04000-05FFF->Disabled
#pragma config WRT3 = OFF // Table Write Protect 06000-07FFF->Disabled
// CONFIG6H
#pragma config WRTC = OFF // Config. Write Protect->Disabled
#pragma config WRTB = OFF // Table Write Protect Boot->Disabled
#pragma config WRTD = OFF // Data EE Write Protect->Disabled
// CONFIG7L
#pragma config EBTR0 = OFF // Table Read Protect 00800-01FFF->Disabled
#pragma config EBTR1 = OFF // Table Read Protect 02000-03FFF->Disabled
#pragma config EBTR2 = OFF // Table Read Protect 04000-05FFF->Disabled
#pragma config EBTR3 = OFF // Table Read Protect 06000-07FFF->Disabled
// CONFIG7H
#pragma config EBTRB = OFF // Table Read Protect Boot->Disabled
#include <xc.h>
void PIN_MANAGER_Initialize(void)
{
/**
LATx registers
*/
LATE = 0x00;
LATD = 0x00;
LATA = 0x00;
LATB = 0x00;
LATC = 0x00;
/**
TRISx registers
*/
TRISE = 0x07;
TRISA = 0xEF;
TRISB = 0x01;
TRISC = 0xBF;
TRISD = 0xFF;
/**
ANSELx registers
*/
ANCON0 = 0x00;
ANCON1 = 0x00;
CM1CON = 0; // Comparator off
CM2CON = 0; // Comparator off
ADCON0 = 0; // A/D conversion Disabled
}
void OSCILLATOR_Initialize(void)
{
// SCS FOSC; HFIOFS not stable; IDLEN disabled; IRCF 8MHz_HF;
OSCCON = 0x60;
// SOSCGO disabled; MFIOSEL disabled; SOSCDRV Low Power;
OSCCON2 = 0x00;
// INTSRC INTRC; PLLEN disabled; TUN 0;
OSCTUNE = 0x00;
// ROSEL System Clock(FOSC); ROON disabled; ROSSLP Disabled in Sleep mode; RODIV Fosc;
REFOCON = 0x00;
}
void EUSART1_Initialize(void)
{
// Set the EUSART1 module to the options selected in the user interface.
// ABDOVF no_overflow; TXCKP async_noninverted_sync_fallingedge; BRG16 16bit_generator; WUE disabled; ABDEN disabled; RXDTP not_inverted;
BAUDCON1 = 0x08;
// SPEN enabled; RX9 8-bit; RX9D 0; CREN enabled; ADDEN disabled; SREN disabled;
RCSTA1 = 0x90;
// TX9 8-bit; TX9D 0; SENDB sync_break_complete; TXEN enabled; SYNC asynchronous; BRGH hi_speed; CSRC slave_mode;
TXSTA1 = 0x24;
//
SPBRG1 = 0xCF;
//
SPBRGH1 = 0x00;
}
void SYSTEM_Initialize(void)
{
PIN_MANAGER_Initialize();
OSCILLATOR_Initialize();
EUSART1_Initialize();
}
//Receive Byte
char Receive_Byte(void)
{
if(RCSTAbits.OERR == 1)
{
RCSTAbits.CREN = 0;
NOP();
RCSTAbits.CREN = 1;
}
while(RCIF == 0 ); // Wait till the rx register becomes empty
return RCREG;
}
//Send a byte
void Send_Byte(char message)
{
while(TXIF == 0 ); // Wait till the transmitter register becomes empty
TXREG1 = message;
}
void String(char *p)
{
while(*p != '\0') {
__delay_ms(1);
Send_Byte(*p);
p++;
}
}
void main(void)
{
char Receive ;
char message[]= {"Hello\n"};
SYSTEM_Initialize();
__delay_ms(1000); // Wait for 1000 ms
String(message); // Send one byte to hyper terminal
while (1)
{
Receive = Receive_Byte(); // Receive a byte from hyper terminal
Send_Byte(Receive); // send received byte back to hyper terminal
}
return;
}
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