guys i really need some help analysing this question. i've attached a picture of the circuit. the circuit shows a 565 ic. the question is to find the tracking frequency range of the pll. but i'm having a tough time even understanding the circuit. i know that the 12k resistor is the external resistor Rt of the pll. 0.01uF is the timing capacitor of the pll. everything is well understood except for 0.001uF capacitor at the top. what is the role of that. i dont quite know how to start analysing the problem.

the only thing i can think of doing is finding out the free running frequency of the pll which would be given by
f0= 0.25/(Rt*Ct) where Rt is the external resistor and Ct is the timing capacitor

and i also know the 10uF resistor at the top along with an internal resistor of 3.6k would make a low pass filter. but i dont know what that 0.001uF capacitor is doing. if anyone can understand the significance of that please tell me.

thanks

 

hey guys i got the answer... the 0.001 uF b/w pin 7 and 8
doesnt have any significance in calculations. apparently its added to eliminate noise.

 

How to use frequency multiplier using PLL,in pspice simulation software, there is no option for 565 IC, Also please provide the circuit for the same,