Hi.
I did it once, long ago. Can you refresh how is it ?

A potentiometer 'Rc' adjusting the charge time, another potentiometer 'Rd' adjusting the discharge time yielded a variable frequency oscillator and at the same time, the time 'Hi' and the time 'Lo'.
The sum of the times was the waveform period (and the oscillation frequency).

Is it just varying 'Rc' and 'Rd' with a fixed C; or there is more to it ?

What is desired is with potentiometer 'Rc' and potentiometer 'Rd' set both at exact same resistance value, to produce a true 50% duty cycle.

 

Something like this?
You may have to tweak the value of R2, depending upon how close to 50% you need with both pots at 50%.

 

Thanks, crutschow.
Yes, remember being something like that...
Charging path is +V to R1 to R2 to U2 to D1 to C2.
Discharging is C2 to D2 to R2 to U3 to 'Dis' open collector to Gnd.

That R2 is something I remember gave me trouble; why is that discharge path more resistive than the charge path ? Is it because it is exposed to +V trough R1 or because of the CE drop at the Dis open collector or due to something else ?

 

why is that discharge path more resistive than the charge path ?

I'm not sure.
Off hand, I would think they should be the same, but the simulation shows otherwise.
Perhaps it's due to the difference between the high and low trigger thresholds as caused by the diode offsets.

 

See

 

Thanks, Bordodynov.
That is as suggested by the data sheet; does not allow independent control of charge and discharge times with a potentiometer for each. It is always 50% duty cycle at any frequency

 

Hi crutschow.
If the charging path was +V to U2 to D1 to C2;
and discharge was C2 to D2 to U3 to Dis
( U2 and U3 not joined at the R1 node ) In other words, U2 not connected to Dis, but only to +V, eliminating R1
R1, R2 seem implemented to prevent full current at extreme potentiometer setting... ¿?

Like
+V-----R1-----U2----D1 ------C2 for charging, and
C2-----D2-----R2-----U3-----Dis for discharging
Being R1 and R2 just to ensure no mayhem at potentiometers extremes, could be replaced by a single R in series to C2, working as limit for both U2 and U3 potentiometers.

Would it make paths more equal ?

 

Yes, R1 creates an asymmetry in the charge/discharge currents. Another way to go is to combine Wally's and Bordo's schematics -

Delete R1
Leave the discharge pin floating
Connect the junction of the two pots (U2 and U3) to the output (pin 3).

This gives you an almost identical voltage and source impedance driving both timing networks. Even better when using a CMOS 555 (LMC555), because its high and low output voltages are almost identically offset from the power rails.

ak

 

R1, R2 seem implemented to prevent full current at extreme potentiometer setting... ¿?

No.
R1 is to provide a charging path for C2 when DIS is open, but limit the current when DIS goes to ground to discharge C2.
R2 is to counter the effect of R1 on the asymmetry in the duty-cycle at the 50% pot settings.

Connect the junction of the two pots (U2 and U3) to the output (pin 3).

This gives you an almost identical voltage and source impedance driving both timing networks. Even better when using a CMOS 555 (LMC555)

That also gives an asymmetry in the duty-cycle due to the bipolar 555 output not going to the supply voltage. This effect is more pronounced at low supply voltages.
Certainly a CMOS 555 (or adding a CD4050 buffer at the output) would largely eliminate that effect.

 

That also gives an asymmetry in the duty-cycle due to the bipolar 555 output not going to the supply voltage. .

And the title of this thread is ...

 

Thanks, gentlemen. Will try soon.

The problem I ran to with my old-humble EWB5 simulator without 7555 in its library and forced to play with 555 only, is that the circuit does not work with a supply under 8V. Doing/testing the circuit with old hands and por vision puts me to suffer. Suggestion... Never get old, it's the shits !

When I insert the diodes the simulator craps.
What is that simulator you use, guys ? Downloadable from the web ?

Edited to clarify.. Varying both duty cycles is fundamental for the application. But when both pots are equally oriented, should be 50%.

 

And the title of this thread is ...

And the TS stated...

What is desired is with potentiometer 'Rc' and potentiometer 'Rd' set both at exact same resistance value, to produce a true 50% duty cycle.

Your serve..

 

What is that simulator you use, guys ? Downloadable from the web ?

I'm using LTspice + my library. Link is on this forum. In my library there are LMC555, 7555 and Mic1557. Pay special attention to the last timer. I used it in several of my projects. The supply voltage is 2.7 ~ 15V and in the case of sot-23-5.

 

Thanks. That will not run in my Linux machine

 

Hello,

@Externet , LTspice will run perfectly using wine on a linux machine.
https://www.winehq.org/
I also have the LTspice on my linux system.

Bertus