Peak in drain current H-bridge (Switchin losses estimation)

Thread Starter


Joined Mar 23, 2021
Good evening everybody,

I am currently designing a measurement method to measure switching losses in a DC-AC converter.
I am using the 'Opposition Method' for this problem. To obtain switching losses a conductive load is placed between two phase arms of the converter.
By using a so called 'hard switching method' i am trying to find all switching losses, including all parasetic influences.

In this circuit in LT-spice i am trying to make this theory work.
When i run this circuit, i find a large peak in the drain current. I don't seem to get rid of this peak.
Dead time does not seem to be the problem. I am using a dead time of 100 ns or more, while the data-sheet of this MOSFET ( BSC900N20NS3 ) shows a rise, fall and delay time of a few nanoseconds.
Does anyone know what is going wrong? Am i missing something?

The charts are showing the drain current in MOSFETs 1 and 4, the PWM from the 4 gates and the voltage and current from the load inductor.

I really hope someone can help me!


Henri Dijk (the Netherlands)



Joined Jan 29, 2010
hi Henri,
Welcome to AAc.
Please post you LTS asc file and any special LTS models used in your simulation we can then compare notes.