I was looking over design resources for routing ethernet applications. One thing I am not sure about is the distance between the PHY and magnetics. Some design resources say route them as close as possible, but other ones says there has be an inch gap, at least. Also, I do not see any documentation of the requirements between the PHY and the micro. I see that they recommend termination resistors, but I do not see anything with regards to space between the PHY and micro. Any one have any experience (bad and good) with this?

 

I have routed magnetics on a 10/100/1000 switch a good 70mm away from the PHY and everyting worked well. Also, RGMII interface betweeen switch chip and additional PHY was about 50mm long and no issues either. All you basically need are usually series resistors on the RGMII output pins to match the 50ohm traces, and whatever the manufacturer recommends on the ethernet traces.
I have seen a working product where the 100mbit ethernet rx/tx data lines were transfered board to board on ordinary 100mil headers without a problem.

Mind you there were no actual ethernet compliance tests performed on any of that, only a test with a 110m long cable to verify that it works good enough.

 

Thanks...I was thinking maybe I could put the micro on the other side if space is a concern, but that would mean I need vias. From the magnetics to the PHY that is undesirable, but I am not to sure about the PHY to the micro. i would imagine it would still be undesirable because of the high frequency.

 

vias are not such a problem, if you go outer layer to outer layer, and you keep the pairs the same and for the rmii keep the signals together for each direction.

 

Thanks....fingers crossed I get this right the first time!