Opto-isolator/ optocoupler for electric isolation in IC design.

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Alex_Khan

Joined May 27, 2020
45
Hello everyone.

I came across while reading the opto-isolator technique used for electric isolation in embedded systems/ Integrated Circuits design that " Opto-isolator is not recommended for electric isolation in power applications IC's mainly due to its dV/dt sensitivity". So I would like to know:

1)How dV/dt sensitivity affects isolation?

2)Is dV/dt sensitivity the only reason to avoid optocoupler especially in power application IC/embedded systems?

3)Are there other limitations in optocoupler which can compel one to chose other isolation techniques?

Looking forward to your suggestions and guidance. Thanks.
 

Tim-MK

Joined Oct 29, 2019
5
Hello everyone.

I came across while reading the opto-isolator technique used for electric isolation in embedded systems/ Integrated Circuits design that " Opto-isolator is not recommended for electric isolation in power applications IC's mainly due to its dV/dt sensitivity". So I would like to know:

1)How dV/dt sensitivity affects isolation?

2)Is dV/dt sensitivity the only reason to avoid optocoupler especially in power application IC/embedded systems?

3)Are there other limitations in optocoupler which can compel one to chose other isolation techniques?

Looking forward to your suggestions and guidance. Thanks.
1: The isolation gap is not affected by small transients in any shape or form, however there is a breakdown voltage to the packaging, typically 5KV or 3.75KV for the smaller SMD packages.
2: Haven't read the article - but it depends on what output configuration you need in your app, transistor, darlington, digital, triac photoMOS etc
3: there are other techniques such a capacitive.... real answer depends on knowing more about your applciation
 
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