Can anyone elaborate on why certain type of op-amp inputs exhibit output phase inversion when the input common mode range is violated? Many sources state that this is common with JFET amplifiers, sometimes BJT's and then MOS.
This is as far as the explanation goes. I know what phase reversal is, and I know how to test for it and prevent it.
What I do want to know is why JFETs (and BJTs) inputs are more likely to cause this.
This is as far as the explanation goes. I know what phase reversal is, and I know how to test for it and prevent it.
What I do want to know is why JFETs (and BJTs) inputs are more likely to cause this.