Would this push pull output have low output impedance? If so, when you connect a load it will still be added in parallel with the resistances seen through the sources of T6 and T7. Adding the load in parallel with a low resistance sounds like a bad thing to me

Yes, that output is a push-pull source follower and would have a low output impedance.

This impedance is obviously in series with the output, not in parallel, since the low impedance sources are in series with the load.

You seem to have a problem with seeing whether an impedance is in series or parallel.

 

You seem to have a problem with seeing whether an impedance is in series or parallel.

Yes I clearly do.

If you short the V1, you will have R1, R2, and R3 all connected to ground and the output node. How is that not in parallel?

 

If you short the V1, you will have R1, R2, and R3 all connected to ground and the output node. How is that not in parallel?

That indeed has all resistors in parallel, but that's not representative of the actual op amp output circuit.
You need to think about how the circuit actually operates.

In the real circuit only one output transistor is conducting at a time, with the other transistor off, in a high impedance state.
So the one that's on has its output impedance is in series with the load and the one that's off has essentially no effect on the output impedance.

 

That indeed has all resistors in parallel, but that's not representative of the actual op amp output circuit.
You need to think about how the circuit actually operates.

In the real circuit only one output transistor is conducting at a time, with the other transistor off, in a high impedance state.
So the one that's on has its output impedance is in series with the load and the one that's off has essentially no effect on the output impedance.

I see! Thank you!!

 

In your last circuit has a very large output impedance (no load). This circuit works in class "B". To obtain a relatively low impedance, it is necessary to translate the operation of the output transistors to the "AB" or "A" class.

 

In your last circuit has a very large output impedance (no load). This circuit works in class "B". To obtain a relatively low impedance, it is necessary to translate the operation of the output transistors to the "AB" or "A" class.

Not the whole story.
The output impedance for that stage is low except for the short period of time when the output transitions from one transistor to the other (the so-called crossover distortion).

 

I specified that the high output impedance for the case without load. Those. No current through output transistors.

 

I specified that the high output impedance for the case without load. Those. No current through output transistors.

That's only of academic, theoretical interest.
If there is no load, then the output impedance is of no consequence, so who cares.
As soon as you add any real world load the output impedance drops to a low level.

 

Hello,

I am not sure if this helps or not because the main point here is not that clear i dont think.

But anyway, if the output top transistor current is 1ma and the applied voltage is 10 volts, then to bias the output to 1/2 Vcc (5v) the lower transistor, whatever type, has to sink 1ma with no load and with 5v across it. That's 5/0.001 Ohms which is 5k for the lower transistor, and since the top transistor also has 5v across it, that is 5k also, so the output impedance is 5k/2=2500 Ohms.

Now if the upper transistor (which acts as a current source) has 10ma through it and the same 5v bias point, then the lower transistor has 5v and 10ma and so R=5/0.01=500 ohms, and ditto for the top transistor, so the output impedance (really output resistance) is 250 ohms now.

This is all without ANY feedback because that changes everything as has been noted by Crutschow.

 

I am confused how you calculate the output impedance of an op amp. Say you have the two stage op amp here:

Usually you calculate the resistance seen a the drain of Q6 in parallel with the resistance of the drain of Q7. This would normally be something like 10k or higher since the transistor is a transconductance amplifier. But why do we say that op amps have a really low output impedance? The thevenin resistance is the exact same as the norton resistance, right?

Thanks

You measure the output impedance of an op amp the same way you measure the output impedance of anything else. For example: set the output to 10 volts. then put a 1 k load on the output and measure the change in output voltage (I assume the op amp will source 10ma - if not use a higher value resistor). The output impedance is delta V divided by delta I. - you just measured v out in loaded and unloaded state. Delta V is the difference in those 2 and the change in current in this example is 10ma. As someone has already pointed out the impedance will be less than 1 ohm. I would add probably way less and unless you have a 5 digit lab standard multimeter you may not be able to notice any difference hence output impedance is effectively 0 ohms.

 

See

 

Thanks for the help everyone. I think my main error was thinking the output resistance when modelling a current source was somehow different from the output resistance when modelling a voltage source.

 

The load is not in parallel with the output resistance, it is in series.

Bob

 

See
View attachment 131474 View attachment 131475 View attachment 131480 View attachment 131481

something very strange here. As the frequency goes up the output impedance will go up even if open loop.

 

yes I saw all the attachments. I still think there is something wrong. In closed loop, once the gain bandwidth is exceeded the impedance goes up - this is because and can only be because the open loop impedance goes up.

 

The output impedance decreases due to the local reverse negative connection (due to the correcting circuit of the resistor R1 and the capacitor C1). And at very high frequencies, the parasitic capacitance of transistors begins to decrease the impedance.

 

Could you show me an example of an op amp that does have a low output impedance?

For example:

Would this push pull output have low output impedance? If so, when you connect a load it will still be added in parallel with the resistances seen through the sources of T6 and T7. Adding the load in parallel with a low resistance sounds like a bad thing to me. I'm confused!! lol

 

Here are some examples of HiZ outs, except the DC follower.

These are for HiMu dual triode circuits, but should be similar to FET's.

Have some other circuits to share but this looks like a dead thread...

 

it is the feedback that makes it look like the op amp has a low output impedance

 

it is the feedback that makes it look like the op amp has a low output impedance