Still working through the TI Handbook and they sure need an editor. Was given this and something was obviously wrong with the LO cutoff freq being higher than the HI cutoff.

Breadboarded and spent a few days working on it. Tried a few different OPAs and ended up moving the grounding caps to the ±V pins instead of having them from the breadboard power rails to gnd rails. Did the calculations using actual component values.

With UA741 Odd little hump...

With TL071

Both show noise and then a LO corner ~700 - 1kHz and pretty flat up to where the sig gen cuts off @ 20MHz. So why am I not seeing any LO/HI corners anywhere near the calculated values?

Breadboarded and spent a few days working on it. Tried a few different OPAs and ended up moving the grounding caps to the ±V pins instead of having them from the breadboard power rails to gnd rails. Did the calculations using actual component values.

With UA741 Odd little hump...

With TL071

Both show noise and then a LO corner ~700 - 1kHz and pretty flat up to where the sig gen cuts off @ 20MHz. So why am I not seeing any LO/HI corners anywhere near the calculated values?