My OR gates show high outputs even if i give no inputs. Should i replace them or is there anything i can still do?

 

If your 7432 is indeed a standard TTL device, then this is correct behavior. An unconnected TTL input floats high. To guarantee that an undriven TTL input is interpreted as being in the low state, connect it to ground directly, or through a resistor no larger than 499 ohms. (Yes, 499 ohms is a standard 1% tolerance value.)

Unlike CMOS, a TTL input is a common base amplifier, and is actually a source of current. To put it in a low state, you must draw a sufficient current out of the input, to ground, to pull the input voltage down below a threshold level. The standard current value is 1.6 mA, and the maximum low state voltage is 0.8 V. That calculates out to 500 ohms. 470 is technically ok but flirting with a problem. 220 and 330 ohms are the more commonly used values.

ak

 

You must connect your inputs to a valid logic LOW or HIGH.
You cannot leave them not connected.

It is a mistake to think that no input means logic LOW.
In fact, for most 74xx series gates, no input results in the input assuming a logic HIGH state because of the gate's input structure.

 

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Thanks for the reply. Never knew that .

If your 7432 is indeed a standard TTL device, then this is correct behavior. An unconnected TTL input floats high. To guarantee that an undriven TTL input is interpreted as being in the low state, connect it to ground directly, or through a resistor no larger than 499 ohms. (Yes, 499 ohms is a standard 1% tolerance value.)

Unlike CMOS, a TTL input is a common base amplifier, and is actually a source of current. To put it in a low state, you must draw a sufficient current out of the input, to ground, to pull the input voltage down below a threshold level. The standard current value is 1.6 mA, and the maximum low state voltage is 0.8 V. That calculates out to 500 ohms. 470 is technically ok but flirting with a problem. 220 and 330 ohms are the more commonly used values.

ak

When my inputs are both LOW, it still outputs HIGH.

 

When my inputs are both LOW, it still outputs HIGH.

On your breadboard picture the switches connect the inputs, via resistors, to the supply not to 0V.

 

On your breadboard picture the switches connect the inputs, via resistors, to the supply not to 0V.

On your breadboard picture the switches connect the inputs, via resistors, to the supply not to 0V.

I dont get it. Please explain more .

 

On a copy of your picture I have drawn a red line linking the points which are connected to the positive supply. This includes the upper ends of the resistors connected to the switches. So the switches can either leave the inputs unconnected (which means that they float high) or can connect them to the resistors and pull then high so whatever the position of the switches the inputs will be high. The top ends of the resistors should be moved to connect to the 0V line - one hole downwards.

 

The fact is that for logic ICs to function as the specifications claim the inputs MUST be what the specifications say. And so an open circuit is not what the specifications use. You must have either a "0" or a "1" at each input. An open circuit is not either. Add a 1K ohm pull-down resistor to the inputs and the output of a TTL or gate should be a logic "0". With an open circuit no particular output is promised.

 

I dont get it. Please explain more .

This will go much faster if you post a schematic of your circuit. This will tell us if there is a problem with your initial idea, approach, and implementation. Be sure to add a reference designator to each component (R1, U2, etc.) and pin numbers for each IC pin. There are a zillion different ways to connect these parts, and a schematic will tell us if you are starting out correctly.

Note - a schematic is not a wiring diagram. For logic circuits, use the symbol for each gate function (in your case, the OR gate symbol), not the package outline. Since there are four gates in one IC, a common way to assign reference designators is U1A, U1B, etc.

ak

 

Add a 1K ohm pull-down resistor to the inputs

1K is good enough for LSTTL, but not standard TTL. See #2 above.

ak

 

Here is an experiment you can conduct yourself in order to determine the appropriate value of the pull-down resistor.

Ignore the switch in the diagram shown above.
You can do this with any gate.

However, if you want to do this with a 7432 dual-input OR-gate, tie one of the inputs directly to GND.
Connect the other input to GND using a variable resistor (or use a handful of different value resistors from 100Ω to 10kΩ).

Adjust the value of the pull-down resistor until the logic output of the gate changes state. You will find that the resistor has two values, one for the logic output going from LOW-to-HIGH and another value for the output going HIGH-to-LOW.

Measure the value of the resistor in both cases.

To order to apply a margin of safety, you could use a pull-down resistor value that is half the value of the one that worked in the experiment (the lower of the two values).

This test only works for 74xx TTL series gates. This will not work for CMOS gates.

 

Actually, that exact circuit should work very well for CMOS IC devices, with the pull down resistor below 47K ohms.

 

Here is an experiment you can conduct yourself in order to determine the appropriate value of the pull-down resistor.

Ignore the switch in the diagram shown above.
You can do this with any gate.

However, if you want to do this with a 7432 dual-input OR-gate, tie one of the inputs directly to GND.
Connect the other input to GND using a variable resistor (or use a handful of different value resistors from 100Ω to 10kΩ).

Adjust the value of the pull-down resistor until the logic output of the gate changes state. You will find that the resistor has two values, one for the logic output going from LOW-to-HIGH and another value for the output going HIGH-to-LOW.

Measure the value of the resistor in both cases.

To order to apply a margin of safety, you could use a pull-down resistor value that is half the value of the one that worked in the experiment (the lower of the two values).

This test only works for 74xx TTL series gates. This will not work for CMOS gates.

It work

It work

It worked on my project . I realized tha LOW still needs a connection which is the ground. Initially I thought LOW is no electricity feed to the IC .

 

It work


It worked on my project . I realized tha LOW still needs a connection which is the ground. Initially I thought LOW is no electricity feed to the IC .

As mentioned in #2 above, a plain TTL input will ACTUALLY source current. The experiment is to connect an input to ground through a resistor and measure the voltage on the input. Current will be V/R. eg. connect a 470 Ω resistor from an input to GND. You should measure approximately 0.75 volts corresponding to 1.6 milliamperes being sourced by the input. For most TTL inputs, 0.75 V is just below the switching threshold that defines a logic "0".