Here's the problem:

Draw a NAND logic diagram that implements the complement of the following function:
F(A, B, C, D) = Ʃ(0, 1, 2, 3, 6, 10, 11, 14)

I simplified the equation using a Karnaugh Map to get:
F = A'B' + CD'

However, I have no idea on how to draw a NAND logic diagram that implements the complement of the function. Help?

Thanks!

 

You have a truth table of ABCDF. When ABCD is 0, 1, 2, 3, 6, 10, 11, 14, the F is 1. What is complement of it? The complement of it is that where F was 0, now F is 1; and where F was 1, now F is 0.

So take your original truth table, add another column to it, call it New F, and fill it up. Look at the old F from previous column, when you see 1 in old F, put 0 in New F. When you see 0 in old F, put 1 in new F. Then do the k-map of New F.

 

If you aren't being required to optimize the logic, then all you need to do is implement the original function with NAND gates and then invert the output using just NAND gates. Can you do each of those?

 

If you aren't being required to optimize the logic, then all you need to do is implement the original function with NAND gates and then invert the output using just NAND gates. Can you do each of those?

To add to WBahn: http://hyperphysics.phy-astr.gsu.edu/hbase/electronic/nand.html#c4