Multistage preamp . Some suggestion for improve it.

DickCappels

Joined Aug 21, 2008
9,501
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Your topology is not very good for your goal of minimum phase shift between input and output. What you seem to be looking at is a very wideband amplifier, and cascading several stages in the way shown isn't getting you close to what you want.

When I look at your circuit I see J2 as being a signal source with about a 1.8k output resistance (ignoring the output capacitance for now.) That stage is followed by the input capacitance of J1, thus you have a low pass filter. This filter also occurs on the input of J3 and J4. That's four similar stages cascaded with the phase shift increasing with each stage.

Some ideas for minimizing phase shift (it is 03:12 AM here and I should be in bed, so this will be brief.)
• Make each stage the equivalent of a cascode amplifier to eliminate Miller feedback in each stage.
• You might also want to change your JFETs to one with less input capacitance.
• Reduce the output impedance of each stage - lower the drain resistor.
• Add an inductor in series with each drain resistor to provide peaking to compensate for the roll-off.

You don't have to use all JFETs do you? You might find bipolar transistors easier to work with, particularly in the upper part of a cascode pair. Even the 2N3904 can help you a lot.

Maybe somebody who knows more about this will have a helpful comment.

Note: Cascode is not the same as cascade. You can look them up independently.

1631996587377.png

example of a cascode amplifier (above)
 

Thread Starter

DaniKowa

Joined Sep 23, 2020
216
Good evening,
thanks for the answers and explanations: in reality the fet would only serve the first stage and as you said, any subsequent stages could be simulated with bjt. In the scheme that I put the first post was also to understand how much it was possible to push with the FETs. I like them but they are very delicate from what I understand. Surely with the bjt they could be an alternative. I take a look and see what I can do about it. Thanks.
 

Thread Starter

DaniKowa

Joined Sep 23, 2020
216
Hi, I did other tests with a bjt calculator on https://www.daycounter.com/Calculators/Cascode/BJT-Cascode-Calculator.phtml . I replicated the circuit described by setting the values suggested by the page. Something does not add up because instead of having a gain I have an attenuation of 92%. The only heats that I have not been able to insert are CB and CBE always on the page. After understanding where the problem is, I can think about the rest. What did I miss? Thanks.

test3.JPG
 

DickCappels

Joined Aug 21, 2008
9,501
You need to make C1 a lot larger so that the base does not move with the emitter. Either that, or replace be bias circuit for Q2 with a resistor to +12V, a Zener to ground, and something like a 0.1 uf multilayer ceramic capacitor.
 

Thread Starter

DaniKowa

Joined Sep 23, 2020
216
Hi,

i did some simulation with the cascode configuration and i like it but i have the same problem as with the single jfet simulation as in the pictures below. When I connect the next stage, the previous one loses gain. This confuses me because I have seen that this type of cascaded configuration can be used with both fet and bjt. There is no decoupling capacitor that solves. I also tried with a coupling with a transformer but I have the same problem. Tell me there is a solution otherwise I won't stop wasting time.

Thanks again.

1.JPG

2.JPG

3.JPG
 

DickCappels

Joined Aug 21, 2008
9,501
Have you considered the input capacitance of the JFET as part of the load on the collector when you connect a second stage? I wonder whether this could be the problem.
 

Danko

Joined Nov 22, 2017
1,487
Hi, I did other tests with a bjt calculator on https://www.daycounter.com/Calculators/Cascode/BJT-Cascode-Calculator.phtml . I replicated the circuit described by setting the values suggested by the page. Something does not add up because instead of having a gain I have an attenuation of 92%. The only heats that I have not been able to insert are CB and CBE always on the page. After understanding where the problem is, I can think about the rest. What did I miss? Thanks.
Look at this circuit. @10MHz voltage gain is 130.
1632558964689.png
 

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