Hi again guys,
After recalculate the value of resistor my simulate finally show the results I wanted. I did use Av=Vout/Vin to get the Voltage gain and the buffer seem work fine with 10v input, but the require is 10mV when I use if, the output of buffer Q1 came out 7.707v volt DC, not AC, but when I use 10Vrms it show the results of AC with amplitude.
Mr. BrownOut and Shteii01 could you help me have a check? Did I fix the problem you guys told me? :X I try to design it from output stage then one by one to buffer stage :x.. or I still need to bias the transistor?
I quite weak on amplifier circuit :x.

 

First of all your transistors are incorrectly biased. As for Q3 you forgot to add voltage divider at the base. Also your capacitors values are way to small for such a low frequency input signal.

 

First of all your transistors are incorrectly biased. As for Q3 you forgot to add voltage divider at the base. Also your capacitors values are way to small for such a low frequency input signal.

Firstly thanks for the advice Jony130,
but I have a really stupid question :x actually how I can detect the transistors is incorrectly biased? :x because I using the voltage divider biasing unloading bypass Common Emitter circuit :x

 

For example the voltage at Q2 base is equal to:

VbQ2 = 15V * 40K/(15k + 40K) = 15 * 40/55 = 10.9V

So the voltage at Q2 emitter is equal 10.2V
So the IcQ2 current is equal to 10.2/3.84k = 2.6mA and the voltage drop at R3 is equal to 2.6mA *5K = 13V.
So Vce = 15V - 13V - 10.2V = -8.2V and this means that Q2 is in saturation.

Try re-calc the resistor values.
First assume Ve = 1V next Vce = 7V so VRc = 7V also.

http://forum.allaboutcircuits.com/showthread.php?p=222413#post222413
http://forum.allaboutcircuits.com/showthread.php?p=494633#post494633

 

I had to look up how to do blocking capacitor.

You said signal is at audio frequencies.
So. I make assumption: 2 Hz to 20 kHz.

One formula I found is to decide that reactance of the blocking capacitor is 2 Ohm.
So.
Xc=1/(2*pi*f*C)
2 = 1/(2*pi*20000*C)
Solve for C.

 

You said signal is at audio frequencies.
So. I make assumption: 2 Hz to 20 kHz.

More typically, the assumption is 20hz to 20khz. More practically, however, it should be about 80 Hz to 15KHz. The equation should solve for the lower -3db corner, so you should have:

c = 1/(2*pi*R*F), where R is the resistance seen by the capacitor and F is the lower -3db frequency.

 

This is pretty rough, I got this for buffer.

Input is brown. 10 mV (20 mV peak to peak). No DC offset. The signal is centered on 0 volts DC.

Output is green. From 5.813 to 5.833 volts, 20 mV peak to peak. But now there is DC offset. I was going for 6 volts DC, but only got 5.823 volts DC.