We have a MIPS uP which has EJTAG interface.

This needs to programmed from Both P1(by default) & P2 connectors

This EJTAG interface needs to be shared between 3 drivers.

1. Assembly Option1 in attached figure. ON/OFF switch will enable EJTAG interface in BLUE lines.
2. Assembly Option2 in attached figure. ON/OFF switch will enable EJTAG interface in GREEN lines.
3. A separate Programming connector directly attached to EJTAG interface of uC.

Assembly Option1 ,Option2 are exclusive , so, i have provided common pad sharing resisters so, that only one will be mounted and other Option related lines are isolated.

But, i can't isolate the connection between uP to Programming connector from common EJTAG lines coming after Option1 & 2 resisters.

We need to operate this EJTAG interface between P1 to U1 at 25Mhz and Interface between P2 to U1 at atleast 18Mhz.

Whether adding a termination at the intersection points such as Z1 will help?

any considerations on routing topology for good SI point of view also helps.

Attached an image which shows my scheme.

 

Any help will be appreciated.

 

How can i move this question to PCB Layout forum

 

as far as i understand your "®request" states a conflict = you want to MUX 3 channels so that P1 is always ON

every possible solution to such is a headache because of the speeds you specify
e.g when you add the pass gate at that voltage level the attenuation is considerable
or if you add the I/O register/controller to the uP -- the back- and forward signals get additional transition times . . .

i don't know about the EJTAG interface nor it's termination options