Evening all,

Would you kind people be able to pick over my design and let me know if there are any issues you can foresee.

I have a motorcycle that has been badly wired with all cables and wire taps over the place. I am integrating a single 12-14V DC supply from the battery into a PCB and having it feed the lighting circuits through the handle bar switchgear.

As part of this I have designed the attached Flasher circuit to supply the LED indicators, these draw around 1W front and rear. So 2W per side and grounded through the indicator itself. The indicator switch on the handle bar feeds the flasher output to the LED, so high side switching is required.

I have a 555 timer set to 50% duty cycle and a frequency of 1.5Hz, the output of which goes to the base on a PNP transistor, when the 555 is high the PNP doesn't conduct, when low the PNP is in saturation. Please ignore the Cap and resistor values in the schematic, they are just for the pcb design footprints.

The actual values are as follows.

R1 = 10K
R2 = 100K
R3 = 1K
R4 = 5.1K
C1 = 47uF
C2 = 100nF

Would there be an issue with the collector of the PNP effectively being floating unless the indicators are on and grounded?

 

Would there be an issue with the collector of the PNP effectively being floating unless the indicators are on and grounded?

View attachment 340443

I don't see any issue but you can place a 10K resistor from the collector to ground.

 

Lovely, that's a nice easy fix. Next step is to layout the PCB and get it made.

 

1. What is the justification for R2? Is it to correct for the asymmetrical output voltage of a bipolar 555? I like this variation of a 555 astable, but the equation in the datasheet does not take into account the upper and lower output voltage headroom, nor the fact that they are unequal. In the CMOS 555 datasheet where the circuit is featured, it assumes that a CMOS 555 will be used, one that has almost zero output voltage headroom issues.

2. By a rough calc, the Q1 base current is 10 mA -ish. If you adhere to the traditional rule of thumb, that's a bit light if you are trying to hard-saturate a switch moving 167 mA. Consider reducing R3 to 470 ohms / 1/2 W.

3. In the 555 high state, the voltage at the R3-R4 node is around 0.33 V. That might be enough to turn off Q1 completely, but again it is a bit close to the edge.

4. Is C2 supposed to be 100 microfarads (uF), not nanofarads (nF)? That would give on and off times of approx. 0.7 s each.

Note that points 1, 2, and 3 can be addressed by changing to an all-MOS circuit: a CMOS LMC555 can swing to within millivolts of both rails, obviating R2; can sink 50 mA in the low state (enough to turn on a bipolar PNP output transistor); and can swing so close to Vcc that Q1 turn-off is assured without needing R4. And, you could change Q1 to a small, p-channel power MOSFET and eliminate R3.

ak

 

1. What is the justification for R2? Is it to correct for the asymmetrical output voltage of a bipolar 555? I like this variation of a 555 astable, but the equation in the datasheet does not take into account the upper and lower output voltage headroom, nor the fact that they are unequal. In the CMOS 555 datasheet where the circuit is featured, it assumes that a CMOS 555 will be used, one that has almost zero output voltage headroom issues.

2. By a rough calc, the Q1 base current is 10 mA -ish. If you adhere to the traditional rule of thumb, that's a bit light if you are trying to hard-saturate a switch moving 167 mA. Consider reducing R3 to 470 ohms / 1/2 W.

3. In the 555 high state, the voltage at the R3-R4 node is around 0.33 V. That might be enough to turn off Q1 completely, but again it is a bit close to the edge.

4. Is C2 supposed to be 100 microfarads (uF), not nanofarads (nF)? That would give on and off times of approx. 0.7 s each.

Note that points 1, 2, and 3 can be addressed by changing to an all-MOS circuit: a CMOS LMC555 can swing to within millivolts of both rails, obviating R2; can sink 50 mA in the low state (enough to turn on a bipolar PNP output transistor); and can swing so close to Vcc that Q1 turn-off is assured without needing R4. And, you could change Q1 to a small, p-channel power MOSFET and eliminate R3.

ak

Thank you for your reply, I have now replace the NE555 with a 7555 cmos timer. The cap issues was a typo and with cap 1 and 2 switched.

 

You did not mention the load for the PNP transistor. Are you sure the transistor noted will handle the current?

 

You did not mention the load for the PNP transistor. Are you sure the transistor noted will handle the current?

I think it's either 2 or 4 watts. Not sure how many lights exactly or appx 340ma max per post #1. The 2907 should be OK.

 

The '2907 should be ok with that much current, but it might need a heatsink.

Would there be an issue with the collector of the PNP effectively being floating unless the indicators are on and grounded?

There should be no problem at all leaving the collector floating.

 

A 600 mA transistor in a 340 mA circuit is less than 50% margin. To me, especially in an electrically dirty environment such as automotive, that is not enough. A TIP30 has better margin and far better thermal management in both its die construction and packaging, but consider a TIP32. The cost difference is a large percentage, but very small in actual money. In your application, the TO-220 package would be more than enough of a heatsink.

A downside to that big fat package is its susceptibility to vibration. It will have to be mounted to something, but that something can be plastic so you don't need an insulated mounting kit.

ak

 

Use a P channel mosfet
IRF9540.

 

I know it's been a few decades, but my old-geezer-gut-reaction to putting FETs in a rugged environment still is nervous. Something about an insulation thickness that is measured not in mm but in *atoms* gives me pause.

ak

 

putting FETs in a rugged environment still is nervous.

Probably no worse then a cmos 555.

 

The package I have gone for is a SOT-223, so will be directly mounted to the board. This should eliminate the vibration issues and heat dissipation.

 

The package I have gone for is a SOT-223, so will be directly mounted to the board. This should eliminate the vibration issues and heat dissipation.

Exactly how many of these 1w indicators are used?

 

Exactly how many of these 1w indicators are used?

2 at a time. Front and rear.

 

An SOT-223 package is not necessarily going to dissipate very much Heat,
especially if the Board has very limited real-estate.
.
.
.

 

It's only 170ma, should be fine with a 50% duty cycle.

 

It's only 170ma, should be fine with a 50% duty cycle.

Especially as the 555 circuit will run for only a few minutes at a time.

 

The Drain terminal is floating when nothing is connected- an invitation to disaster in terms of ESD over voltages.
Positive going ESD will be clamped by the body diode, but negative going transients will destroy the FET.

Add a clamping diode to the circuit, cathode to Drain, anode to ground.

 

Transients should be covered by the TVS I have added in along with the stabilising capacitor.