Mosfet gate ringing

Thread Starter

cmartinez

Joined Jan 17, 2007
8,218
I need to PWM a mosfet at a maximum frequency of 200 KHz, and I'm aware that at those speeds "gate ringing" becomes an issue. From what I've seen, it's customary to include a small value resistor (about 10 ohms or so) between the driver and the FET's gate in order to limit inrush current into the gate. I've also learned that it's also good practice to place an inverse parallel diode with said resistor to minimize the gate's discharge time ... these last points are important only at high switching frequencies, and become insubstantial at low frequencies.

My specific questions are:
  • Why is ringing an issue? Would "false triggering" or "stuttering" during turn-on happen in extreme cases?
  • What's the main cause behind said ringing? Is it only the FET's gate capacitance or is there some other mechanism involved?
  • What would be the best way to simulate a specific FET's gate in LTSpice? That is, would it be too hard to build a small circuit in the simulator that would behave exactly as a FET's gate? Never mind the switching side of the FET for now, at this point I'm only interested in correctly exciting its gate.
 

Ams Sma

Joined Feb 11, 2017
17
As far as i know the gate capacitance is responsible for the ringing.

You can use a mosfet driver IC (like IR2110 OR IR2113) to supply enough current to the gate and attenuate the ringing.

Note that the ringing usually is more noticeable as your work frequency and power increases.
 

Thread Starter

cmartinez

Joined Jan 17, 2007
8,218
You can use a mosfet driver IC (like IR2110 OR IR2113) to supply enough current to the gate and attenuate the ringing.
I'm planning on doing just that, but I'd like to know the why of said ringing. I know it has to do with the gate's capacitance, but is there some sort of "electrical inertia" going on? I've always pictured inductance as equivalent to inertia ... that's why I'm a little confused.

Simulating a FET's gate would allow me to play with all different parameters and help me more thoroughly understand this phenomenon.
 

Ams Sma

Joined Feb 11, 2017
17
I'm planning on doing just that, but I'd like to know the why of said ringing. I know it has to do with the gate's capacitance, but is there some sort of "electrical inertia" going on? I've always pictured inductance as equivalent to inertia ... that's why I'm a little confused.

Simulating a FET's gate would allow me to play with all different parameters and help me more thoroughly understand this phenomenon.
A ringing is an oscillation. In this case formed by the mosfet parasitic capacitances. When the mosfet changes its state a probably a positive feedback in the terminals causes the oscillation.

Unfortunately i don't know any program to thoroughly simulate these riggins.
 

Thread Starter

cmartinez

Joined Jan 17, 2007
8,218
I'm using one of those drivers from Infineon to PWM a power mosfet at 10kHz. It's low frequency, so probably I won't face severe problems.
I wouldn't be too concerned about this sort of thing at 10KHz either. But it would be interesting to scope the gate anyway, just to see how it behaves.
 

ebp

Joined Feb 8, 2018
2,332
Simulation for this issue must include the inductances to be of any use whatever. I doubt if the LTSpice models include package inductances for anything that isn't conspicuously an inductor. They could be simulated as discrete inductances if they are hard to add to the models, but note from the Fairchild doc there is rather a lot of them. The connections between devices can contribute a lot of inductance, which is why layout is so important. It can be instructive to play with simulation of simple LCR resonant circuits, noting how relatively small resistance can have a fairly strong influence on the peaking in the gain.

Ringing can be a problem at any switching frequency. At low frequency you can usually afford to slow the switching transitions a moderate amount without having a great impact on overall efficiency. This allows you to use a relatively resistor in series with the gate.

Putting a diode, especially a crude great lump of silicon like a 1N400x, in parallel with the gate resistor at least partially defeats much of what the gate resistor is there for in the first place. Rarely is the diode necessary and if it is it should have its own series resistor. Typically you would use an ultrafast recovery diode. At moderate current a fast signal diode like a 1N4148 is suitable. If including the diode and its series resistor adds length to the connection path it may be make ringing worse.
 

Thread Starter

cmartinez

Joined Jan 17, 2007
8,218
This is one of my favorite application notes on ringing: https://www.fairchildsemi.com/application-notes/AN/AN-9005.pdf

The concerns I have seen expressed are efficiency, increase in EMI, and with sever ringing, the possibility of exceeding the safe gate-source voltage and rupturing the gate.

This is extremely useful, John. Thanks for posting!

Typically, parasitic oscillation frequencies are in the range of several tens to hundreds of megahertz. The parasitic oscillation can cause gate-source breakdown, bad EMI, large switching losses, losing gate control, and can even lead to MOSFET failures. A ferrite bead is often used on MOSFET gate leads to provide stable operation by suppressing parasitic oscillation, while minimizing switching losses. In fact, adding a ferrite bead is more effective than using gate resistance alone because the impedance of the ferrite bead varies by frequency.
 

crutschow

Joined Mar 14, 2008
34,281
What's the main cause behind said ringing? Is it only the FET's gate capacitance or is there some other mechanism involved?
It's the stray wire connection inductance to the gate in series with the gate capacitance that forms a resonant tank circuit.
That is what causes the ringing.
If there were no stray inductance, there would be no ringing.

You can simulate that in Spice by adding some series stray inductance at the gate input.
It's very roughly about 20nH/inch for wire not close to a plane.
Here's a calculator for that.
Using twisted pair wire or having the wire close to a ground plane will reduce its inductance.
 

Thread Starter

cmartinez

Joined Jan 17, 2007
8,218
It's the stray wire connection inductance to the gate in series with the gate capacitance that forms a resonant tank circuit.
That is what causes the ringing.
If there were no stray inductance, there would be no ringing.

You can simulate that in Spice by adding some series stray inductance at the gate input.
It's very roughly about 20nH/inch for wire not close to a plane.
Here's a calculator for that.
Using twisted pair wire or having the wire close to a ground plane will reduce its inductance.
Thanks, crutschow :). I knew you'd eventually chime in... this subject being right up your alley. :)

Anyway, your straight-to-the-point explanation makes perfect sense to me now... I'm assuming that the inductance in question is generated by the total distance from the driver's output pin, through the pcb's trace, and then to the Fet's gate pin (which contributes with additional length), am I right? ... that's why the distance between the driver's output and the Fet's gate should be kept to a minimum... and maybe a smt Fet is better suited for high frequencies for the same reason ... right?

So far, I've only taken a quick look at the documents posted by John and Xavier. But tomorrow I'll give them a thorough read when I can.

Another important question: Does a Fet's gate behave differently depending on the current (load) flowing from Drain to Source? ... intuition tells me that it shouldn't, but common sense tells me that there's probably more to it than I realize.
 

Wendy

Joined Mar 24, 2008
23,415
My understanding is any length of wire is an inductance, but more than that theory fails me.
LC circuits ring, it is what they do.
Following this thread with great interest.
 

crutschow

Joined Mar 14, 2008
34,281
I'm assuming that the inductance in question is generated by the total distance from the driver's output pin, through the pcb's trace, and then to the Fet's gate pin (which contributes with additional length), am I right? ..
Yes.
that's why the distance between the driver's output and the Fet's gate should be kept to a minimum.
Yes.
Also if the wire/trace is close to a ground plane it will have much less inductance.
a smt Fet is better suited for high frequencies for the same reason
Yes.
Does a Fet's gate behave differently depending on the current (load) flowing from Drain to Source?
Not significantly as far as ringing is concerned.
But the drain voltage (not current) switched will affect the gate charge required to charge and discharge the gate due to the Miller effect.
 
Last edited:

Thread Starter

cmartinez

Joined Jan 17, 2007
8,218
Yes.
Yes.
Yes.
Also if the wire/trace is close to a ground plane it will have much less inductance.
Yes.
Not significantly as far as ringing is concerned.
But the drain voltage (not current) switched will affect the gate charge required to charge and discharge the gate due to the Miller effect.
Man... too bad there's not a "double like" button in this place :)

Now I'm off to do a little research on that Miller effect you've brought up.

Thanks!
 

ArakelTheDragon

Joined Nov 18, 2016
1,362
Excellent source of info, Xavier. Thanks for sharing.
You are right,
I'm planning on doing just that, but I'd like to know the why of said ringing. I know it has to do with the gate's capacitance, but is there some sort of "electrical inertia" going on? I've always pictured inductance as equivalent to inertia ... that's why I'm a little confused.

Simulating a FET's gate would allow me to play with all different parameters and help me more thoroughly understand this phenomenon.
As far as I can think, this oscilation may continue after the transistor is suppose to be off and that causes it to trigger unvoluntarily.
 

MrAl

Joined Jun 17, 2014
11,389
I need to PWM a mosfet at a maximum frequency of 200 KHz, and I'm aware that at those speeds "gate ringing" becomes an issue. From what I've seen, it's customary to include a small value resistor (about 10 ohms or so) between the driver and the FET's gate in order to limit inrush current into the gate. I've also learned that it's also good practice to place an inverse parallel diode with said resistor to minimize the gate's discharge time ... these last points are important only at high switching frequencies, and become insubstantial at low frequencies.

My specific questions are:
  • Why is ringing an issue? Would "false triggering" or "stuttering" during turn-on happen in extreme cases?
  • What's the main cause behind said ringing? Is it only the FET's gate capacitance or is there some other mechanism involved?
  • What would be the best way to simulate a specific FET's gate in LTSpice? That is, would it be too hard to build a small circuit in the simulator that would behave exactly as a FET's gate? Never mind the switching side of the FET for now, at this point I'm only interested in correctly exciting its gate.
Hi,

In a word, the mosfet source inductance.
That's because as the mosfet switches the source inductance causes internal source modulation, which in turn causes device stuttering.
That's the main reason for the small gate resistor along with any lead inductance leading up to the package source terminal.
 

shortbus

Joined Sep 30, 2009
10,045
I'm late to this discussion, but it was/is my understanding that the 'ringing' is more of a problem at turn-off not turn-on. I see a lot of circuits using the diode biased for conducting at turn off direction,supposedly to increase turn off speed. But they don't show the recommended small value resistor in series with that diode, that lowers the ringing at turn off. I always thought it would be better to put the diode biased to be conducting at turn-on if you use one at all.
 

Thread Starter

cmartinez

Joined Jan 17, 2007
8,218
I'm late to this discussion, but it was/is my understanding that the 'ringing' is more of a problem at turn-off not turn-on. I see a lot of circuits using the diode biased for conducting at turn off direction,supposedly to increase turn off speed. But they don't show the recommended small value resistor in series with that diode, that lowers the ringing at turn off. I always thought it would be better to put the diode biased to be conducting at turn-on if you use one at all.
From what I've been gathering, ringing is a problem in both directions. And the use of a discharge diode can be counter-productive.

Here are a couple of interesting highlights from two documents that I've attached:



upload_2018-9-4_9-43-30.png


upload_2018-9-4_9-44-24.png
 

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