Mosfet dying when appling 5v to gate

Thread Starter

Lolrapa

Joined Sep 19, 2018
18
Hello, I'm starting to learn about mosfets and I've made a circuit like this:



The idea of using two mosfets is that, in the future, the battery will be changed for a 17v power supply and Q1 will be activated with a 5v signal, thus providing 17v in the gate of Q2, reducing the voltage drop to the minimum.
The problem is when I connect 5v to Q1 gate it simply dies, not heat or smoke, it just dies.
I dont know if it is important but Rload is basically a D-L-C combination of a simple buck converter.

Thanks!
 

danadak

Joined Mar 10, 2018
4,057
What are you using for source, a battery as schematic shows or another
DC/DC ? If so check that for transients with a scope.

You could also ground Q2 gate, and with a scope look at supply rail coming out of
Q2 for transients from the load.

When you measure blown Q1, gate to drain or gate to source, what results do you
get ? If very low there is a blown gate oxide from excess V.

Regards, Dana.
 

crutschow

Joined Mar 14, 2008
25,645
The IRF540 requires a Vgs of -10V to fully turn on.
For 5V, Q2 should be a logic-level type (Vgs max threshold of ≤2V).

Otherwise use at least 10V for Batt1.
reducing the voltage drop to the minimum.
If you want minimum voltage drop then you should remove D1, which will provide at least a 0.7V drop.
Rload is basically a D-L-C combination of a simple buck converter.
What's D?
Do you mean R?
 

Thread Starter

Lolrapa

Joined Sep 19, 2018
18
What are you using for source, a battery as schematic shows or another
DC/DC ? If so check that for transients with a scope.

You could also ground Q2 gate, and with a scope look at supply rail coming out of
Q2 for transients from the load.

When you measure blown Q1, gate to drain or gate to source, what results do you
get ? If very low there is a blown gate oxide from excess V.

Regards, Dana.
Hello Dana,
Thanks for the answer!

The battery is actually a 7805 regulator with decoupling capacitors at the output.

I dont have a scope to measure transients :( but the circuit is theoretically right no? At least at first sight?
I mean there is nothing hugely wrong about it right?

How do I measure the blown Q1? In conducitvity terms there is allways conductivity from drain to source regardless of wich pin (drain or source) is the gate pin touching. When I make a circuit with a led and a resistor in the drain, the led keeps on regardelss of the voltage in the gate.
 

Thread Starter

Lolrapa

Joined Sep 19, 2018
18
The IRF540 requires a Vgs of -10V to fully turn on.
For 5V, Q2 should be a logic-level type (Vgs max threshold of ≤2V).

Otherwise use at least 10V for Batt1.

If you want minimum voltage drop then you should remove D1, which will provide at least a 0.7V drop.
What's D?
Do you mean R?
Thanks!

-I may be missreading the datasheet but Farchild's darasheet for IRF540N indicates a maximum Vgs(th) value of 4v, isnt that the voltage I must apply between gate and source to fully turn it on?

-The right side of the circuit will be eventually connected to a battery, diode is needed to block reverse current flow and prevent the battery from discharging when the voltage imput is off.

- By D I mean diode, the buck regulator has a diode, an inductor and a capacitor at the output of the mosfet
 

danadak

Joined Mar 10, 2018
4,057
To test gate tie source and drain together, and connect ohmmeter to
gate and source/drain junction. You should measure an open basically.

The Vishay datasheet also shows Vth to be 4V max.

If you do not have a scope get a ~6V zener and tie that Q1 gate to ground. Do
that also Q1 drain to ground, and see if circuit no longer fails.

If you do not have a scope here is a low speed freebee -

You can start with a PC sound card based scope for free. Will give you basically
audio range scope, spectrum analyzer, and function generator all using your
PC sound card. It may not be fast enough to handle the character LCD interface
however.


https://www.zeitnitz.eu/scope_en


http://www.zelscope.com/


http://www.ledametrix.com/oscope/


http://www.virtins.com/downloads.shtml


But first build a simple circuit to protect sound card inputs so you do not
ruin from transients, overvoltage. Google "protect sound card input".


For example http://makezine.com/projects/sound-card-oscilloscope/



A real inexpensive Logic Analyzer/pc combo can be had with this -

https://www.ebay.com/itm/USB-Logic-...h=item33f2ef28ec:g:NNoAAOSwjXVaoiyH:rk:4:pf:0

There are many vendors of this on ebay.

You download and install Saleae software to run it. https://www.saleae.com/downloads/


Regards, Dana.
 

ebp

Joined Feb 8, 2018
2,332
There is no reason Q1 should fail. The voltage you are using is below the allowable maximum and the drain current is small. It is always best in a circuit like that to put a resistor between the gate and source to be sure the FET stays off if the gate isn't connected to anything. Are certain you are connecting it properly? Double check a datasheet to be sure the pins are what you think they are.

The larger FET is being used in a "common drain" also called "source follower" configuration. To even start to turn that FET on sufficiently to allow it to conduct a fraction of a milliampere the voltage between the gate and source of somewhere between 2 and 4 volts - the "gate-source threshold voltage." Some parts may start to turn on at 2 volts, others may not with less than 4 volts. The voltage you get across the load will be equal to the voltage you apply to the gate MINUS the gate to source voltage required for the current that would flow. If the load were very high resistance, your circuit would apply somewhere between 1 V (5 V - 4 V) and 3 V (5 V - 2 V) to the load. For lower load resistance you would get even less. If you wanted the full 5 V input voltage across the load you would need to apply at least 9 V, measured relative to the supply negative ("ground") to be certain of getting 5 V. That is with a simple resistive load.

I wrote a fairly lengthy description of what happens in a source follower quite recently. I'll see if I can find it and link to it.
 

crutschow

Joined Mar 14, 2008
25,645
The larger FET is being used in a "common drain" also called "source follower" configuration.
I somehow missed that. :oops:
So for proper operation of that circuit, Q2 should be a logic-level type P-MOSFET, not an N-MOSFET.
That will allow it to be fully turned on with a 5V supply.
 

Audioguru

Joined Dec 20, 2007
11,249
Dana, the numbers on your schematic have no meaning. Volts? Amps? Temperature?
Since some IRF540 Mosfets barely turn on when the gate-source voltage is 4V then the current in the 10 ohm resistor could be only 15mA, and the voltage across it could be only 0.15V.
 

danadak

Joined Mar 10, 2018
4,057
Dana, the numbers on your schematic have no meaning. Volts? Amps? Temperature?
Problem of the simulator, does not label its measurement points.

The node with the arrow is current, rest V.

Regards, Dana.
 

danadak

Joined Mar 10, 2018
4,057
Since some IRF540 Mosfets barely turn on when the gate-source voltage is 4V then the current in the 10 ohm resistor could be only 15mA, and the voltage across it could be only 0.15V.
upload_2018-10-18_5-45-56.png

Spec is 250 uA drain current, Vgs = 4, worst case. But as you can see typical
at room T > 2A. So turn on is not exactly great for the application. I will check sim
model to see what they used for Vth. Spec sheet I used was originator, IR.

Regards, Dana.

PS : Checked sim model, they use 3.7V for VTO, which looks like they are
using a "typical" value. No idea why that was picked. Maybe process mean ?
 
Last edited:

Audioguru

Joined Dec 20, 2007
11,249
Hello Digikey. Could you measure some IRF540 Mosfets and find one that has a "typical" gate-source voltage that creates "typical current" pleeease? Oh, I didn't know the ones in stock are from minimum to maximum. Oh, you might not even have a "typical" one?
 

ebp

Joined Feb 8, 2018
2,332
Every standard model for simulation is based on typical values. More sophisticated models will include limits that have to be invoked. I believe LTSpice allows easy stepping of device parameters by incantations added as text on the schematic.

There is little point in fussing about three tenths of a volt difference in gate-source threshold voltage. A simple simulation with a typical value still illustrates the fundamental concept of a source follower, and shows that it is unsuitable for the intended purpose. Saying that 4.0 V is the correct value to use is still wrong, because that is from a specification at 25 °C. The Vishay datasheet makes no mention of the behavior at -40 °C with regard to this parameter. Some datasheets will include curves for typical transfer characteristics at various temperatures, but the curves are invariably unreadable with regard to threshold voltage because of the scale of the Y axis. Threshold voltage isn't really a particularly useful parameter for most applications. If the spec'd max is close to the max you can apply, the spec tells you you should find a different part, but that's about it.

Any way you look at it, even a full 5 volts gate to source for an IRF540 is marginal for any application for which that part is a sensible choice. Although not always necessary and sometimes a bit inadequate, my usual approach to driving FETs for high speed switching is to assure gate source voltage of about twice the gate charge plateau voltage, which for an IRF540 would mean about about 9 volts. Taking the gate higher than that generally makes relatively little improvement in the ON resistance and slows turn off because of the extra charge that must be sucked out to get turn-off started.

The TS's end application is a buck converter. A high-side P-channel with simple drive is not suitable because switching loss will be high due to slow discharge of the gate. A proper gate drive circuit with good source and sink drive capability of at least a few hundred milliamps each way is necessary. If an N-channel is used, a floating gate drive power supply or a charge-pumped driver is required. Charged pumped drivers won't allow start up in some situations.
 

danadak

Joined Mar 10, 2018
4,057
Some interesting comments to the sim.

It was not done to prove it could work, it was done to see what
op point would be for the model used. Driven largely by laziness
at solving the non linear expressions needed. Curiosity was motive,
and I should have stated that, along with the fact NO sim is ever
perfectly accurate due to incomplete models, circuits, layouts,
numerical limitations.....

assure gate source voltage of about twice the gate charge plateau voltage
Curious about this, as it would seem no logic level MOSFET, for todays Vth's,
is capable of working with 3.3V logic, and given spec is usually room T then
2.5V parts would not be low enough either for 5V logic ? What do you use in
these situations (besides the obvious, bipolars) ?

And lets not trash Digikey, why I would even trust them to screen my pacemaker
components :)

Regards, Dana.
 

ebp

Joined Feb 8, 2018
2,332
Dana, I failed to make clear I was referring to "conventional" FETs for high speed switching of a few hundred volts for SMPS applications. The twice-plateau thing is just sort of a rule of thumb, which means sometimes it goes too far and sometimes not far enough. What it does almost always mean is that you really don't need more than about 10 Vgs for the vast majority of FETs.

With all FETs, you can accomplish some reduction in Rds ON by increasing the gate-source voltage, but the gains are generally pretty small and for high voltage switching of inductive loads the improvement in overall efficiency is pretty minor. Putting more charge into the gate than actually brings useful benefit does mean it takes longer to get turn-off underway. In terms of the effect on duty cycle, it is largely a "who cares?" thing because the fixer-of-all-that-is-evil, the error amp, compensates. BUT if you need to turn off really fast because an inductor is saturating (and there will already be delay in the sense circuit), the less time it takes to accomplish turn-off the better.

I wouldn't attempt to use low voltage logic level drive for fast, high-frequency switching of significant power. It is a rare logic output spec'd to handle more than about 50 mA, and that is at least an order of magnitude less than you often need. Against that, some of the newest logic level FETs are rather spectacular in terms of high transconductance, very low threshold voltage and very low gate charge. The SI2300DS from Vishay-Siliconix, which bertus recommended recently, is such a FET. You can get close to my rule of thumb on typical spec with 3 V on the gate and it would be quite usable for lots of aps at 2 Vgs. You could get it to the high end of the gate charge plateau in 30 ns or so with just 50 mA into the gate which is really quite impressive. One of the single gate CMOS devices with characteristics like AC series would make a fairly respectable gate driver.

Datasheets are frustrating when it comes to more difficult circumstances. They almost always leave you looking at tabular data and typical curves and trying to arrive at what factors need to be applied. For logic level slower switching, the transfer characteristic curves in comparison with the tabular data often are sufficient. I still have a quick look at the gate charge curve because the plateau voltage does give an quick eyeball estimate of suitability.
 

BobaMosfet

Joined Jul 1, 2009
1,224
Hello, I'm starting to learn about mosfets and I've made a circuit like this:



The idea of using two mosfets is that, in the future, the battery will be changed for a 17v power supply and Q1 will be activated with a 5v signal, thus providing 17v in the gate of Q2, reducing the voltage drop to the minimum.
The problem is when I connect 5v to Q1 gate it simply dies, not heat or smoke, it just dies.
I dont know if it is important but Rload is basically a D-L-C combination of a simple buck converter.

Thanks!
This is a small suggestion- where's your resistor on the base of Q1?
 
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