Trying to get this cheap nfc chip working under 1.8v system.

By default it speaks spi at 3v3. I constructed 1v8 3v3 level converter using txb0108 . And what I can tell with my oscilloscope it seems to be working. But still I get errors while reading/writing.

I was reading datasheet and noticed Pin #2 - PVDD pin power supply. And remembered reading reference design that said something about selectable io levels. I thought that it would be simpler and less error prone to try interface without level transformation. So I yanked mfrc522 chip out and redid some circuit pathing under it. reflowed, put 1.8v to pin #2(PVDD) 3.3v elsewhere. And the result was exactly the same.

Does somebody have more experience with datasheets and can say if my assumption to supply 1.8v to PVDD to get 1.8v level io was correct?

 

Trying to get this cheap nfc chip working under 1.8v system.

By default it speaks spi at 3v3. I constructed 1v8 3v3 level converter using txb0108 . And what I can tell with my oscilloscope it seems to be working. But still I get errors while reading/writing.

I was reading datasheet and noticed Pin #2 - PVDD pin power supply. And remembered reading reference design that said something about selectable io levels. I thought that it would be simpler and less error prone to try interface without level transformation. So I yanked mfrc522 chip out and redid some circuit pathing under it. reflowed, put 1.8v to pin #2(PVDD) 3.3v elsewhere. And the result was exactly the same.

Does somebody have more experience with datasheets and can say if my assumption to supply 1.8v to PVDD to get 1.8v level io was correct?

When you say that you get errors, what exactly do you mean? The reason I ask is that SPI has no inherent error detection or correction mechanism.
A schematic diagram would be helpful since I cannot visualize your circuit from the verbal description. As I look at the chip's block diagram all the pins powered by PVDD will be at 1.8V, not just the SPI pins. Is this what you intended?

 

Trying to get this cheap nfc chip working under 1.8v system.

By default it speaks spi at 3v3. I constructed 1v8 3v3 level converter using txb0108 . And what I can tell with my oscilloscope it seems to be working. But still I get errors while reading/writing.

I was reading datasheet and noticed Pin #2 - PVDD pin power supply. And remembered reading reference design that said something about selectable io levels. I thought that it would be simpler and less error prone to try interface without level transformation. So I yanked mfrc522 chip out and redid some circuit pathing under it. reflowed, put 1.8v to pin #2(PVDD) 3.3v elsewhere. And the result was exactly the same.

Does somebody have more experience with datasheets and can say if my assumption to supply 1.8v to PVDD to get 1.8v level io was correct?

I have that same datasheet open in front of me and it seems certain that PVDD can be at any level above 1.6V and below AVDD,TVDD and DVDD , the last three of which must be at the same voltage. As pointed out previously, all digital I/O levels are from PVDD.

 

When you say that you get errors, what exactly do you mean? The reason I ask is that SPI has no inherent error detection or correction mechanism.
A schematic diagram would be helpful since I cannot visualize your circuit from the verbal description. As I look at the chip's block diagram all the pins powered by PVDD will be at 1.8V, not just the SPI pins. Is this what you intended?

Yes, I would like all the digital lines to be 1.8v. And by errors I mean, that for example I can read register values, chip version, etc. But when trying to write to that register and re-read it, I get back the default values.

And spidev_test, gives this. (on second+n try, the first run gives same but first bytes are 00, ff,ff,ff,ff,ff)

0D 00 00 00 00 00
00 60 00 00 00 00
95 FF FF FF FF FF
FF FF FF FF FF FF
FF FF FF FF FF FF
FF DE AD BE EF BA
AD F0

And this should be the result:

     0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
                0x40, 0x00, 0x00, 0x00, 0x00, 0x95,
                0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
                0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
                0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
                0xDE, 0xAD, 0xBE, 0xEF, 0xBA, 0xAD,
                0xF0, 0x0D,

I have that same datasheet open in front of me and it seems certain that PVDD can be at any level above 1.6V and below AVDD,TVDD and DVDD , the last three of which must be at the same voltage. As pointed out previously, all digital I/O levels are from PVDD.

Thanks for confirming that. My pvdd is 1.92v, thats coming from master. If I read correctly mfrc522 then decodes input hi as +0.7v and low as 0.3v. Shouldn't be a problem i guess.

 

Are you sure that the thresholds are not 0.7 times Vdd and 0.3 times Vdd which would be typical CMOS thresholds?
Those would be 1.344 Volts and 0.576 volts.

In complex chips with SPI interfaces I have encountered a number with write only registers. What you need to confirm is the register is both readable and writeable and the the values written are supposed to come back unchanged. It is really easy to fall into this trap if that is what is happening and the datasheet does not make this explicit. Another thing is that unreadable registers often return a string of ones or a string of zeros.

 

Yes, I would like all the digital lines to be 1.8v. And by errors I mean, that for example I can read register values, chip version, etc. But when trying to write to that register and re-read it, I get back the default values.

And spidev_test, gives this. (on second+n try, the first run gives same but first bytes are 00, ff,ff,ff,ff,ff)

0D 00 00 00 00 00
00 60 00 00 00 00
95 FF FF FF FF FF
FF FF FF FF FF FF
FF FF FF FF FF FF
FF DE AD BE EF BA
AD F0

And this should be the result:

     0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
                0x40, 0x00, 0x00, 0x00, 0x00, 0x95,
                0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
                0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
                0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
                0xDE, 0xAD, 0xBE, 0xEF, 0xBA, 0xAD,
                0xF0, 0x0D,

Thanks for confirming that. My pvdd is 1.92v, thats coming from master. If I read correctly mfrc522 then decodes input hi as +0.7v and low as 0.3v. Shouldn't be a problem i guess.

It took me a fair amount of screwing around to read/write the MFRC522 via SPI.
Do any of these ring a bell?
- tried every combination of clock and data-phasing
- forgot to set the MSB high for register-writing
- forgot to shift the register-value left

In the end, I just pounded on reading all 64 registers til they matched the power-on-reset values, then
pounded on writing until I could write any WRITABLE bit.

 

It took me a fair amount of screwing around to read/write the MFRC522 via SPI.
Do any of these ring a bell?
- tried every combination of clock and data-phasing
- forgot to set the MSB high for register-writing
- forgot to shift the register-value left

In the end, I just pounded on reading all 64 registers til they matched the power-on-reset values, then
pounded on writing until I could write any WRITABLE bit.

They all ring bells, because I've encountered all of them. It might help if you got yourself a Beagle Analyzer. Made all the difference in my SPI adventures.

 

What about that spidev_test.c? Should I be worried about it? JWHassler: What library/language you're using?

 

What about that spidev_test.c? Should I be worried about it? JWHassler: What library/language you're using?

That 'spidev_test.c' looks like it should work for configuring/debugging the SPI-unit: the source code shows that all aspects of the SPI-protocol. can be changed.

I'm using an Arduino thingy I found at https://labitat.dk/wiki/RFID_RC522-AN#The_code_has_been_added_here ..
... modified for a Freescale S12C32 board I had lying around. The SPI is not my problem ( Motorola invented SPI, f'goshsakes.)