Hi everyone,

The transmitter output path is RFpin → Choke → DC-Block → Matching Network (PI/T) → 50 Ω antenna. Because the datasheet doesn’t pin down the pin impedance, I probed it directly: Zin (RFpin) ≈ 6.6 – j108.5 Ω (|X|/R ≈ 16.4). I now want to confirm the loaded Q / -3 dB bandwidth of the full chain by sweeping S21.

If I measure S21 with the VNA’s usual 50 Ω ports and take Q = f₀ ⁄ (f₂ – f₁) at the -3 dB points, does the mismatch on the source side (6.6 Ω vs 50 Ω) simply fold into that result, or should I de-embed the 6.6 – j108.5 Ω first (e.g., with a broadband matching pad or offline renormalization)? Likewise, for isolating the contribution of each PI/T cell, is it worth breaking the chain and inserting 50 Ω fixtures, or is post-processing the full S-matrix standard practice?

Any proven technique or reference that keeps the setup simple while still giving a trustworthy Q figure would be a big help—thanks!

— Kafei

 

Because the datasheet doesn't...

What datasheet?

 

What datasheet?

Here are the documents I’m working from:

• Datasheet: NTM88Jxx5S,
• User Manual: UM11227 (NXP).
• Application Note: “NXP TPMS – Recommended Impedance to be Presented at the RF Pin / Matching Network Design.”
  

That app-note shows a one-shot matching network (no de-embedding), but every time I followed it the result was dramatically narrower bandwidth and higher mismatch than the classic approach—i.e., measuring the RF pin directly with the VNA, renormalizing to the measured 6.6 – j108.5 Ω, and designing the match from there.

For what it’s worth, the 6.6 – j108.5 Ω figure is very stable: multiple boards, multiple VNAs, over a six-month span, always within a few ohms/reactive ohms of that value. So I’m confident the pin really does present that impedance, and that the VNA-based method is the better starting point.

 

The images below show my actual schematic and the corresponding PCB layout for reference.

 

From the TPMS presentation, on slide 5, the recommended load for the transmitter @ 434 MHz is ZL=154+j241 or 531 Ohm || 124.5 nH at max. output power (8.6 dBm). This puts the transmitter at 154-j241 or 531 Ohm || 1.08 pF. The 531 Ohm make sense as the optimal load for an output power of 8.6 dBm @ 3 V DC is close to this value.

For matching, you could use a 124 nH shunt inductor as a DC choke and as compensation for the 1.08 pF parasitic output capacitance of the transmitter. The remaining 531 Ohm are matched to 50 Ohm by a lowpass L-match made out of a 2.2 pF shunt cap and a 56 nH series inductor followed by a 1 nF series DC blocking capacitor. This are ideal component values and need to be slightly adjusted depending on PCB layout and real component properties.

Because the datasheet doesn’t pin down the pin impedance, I probed it directly: Zin (RFpin) ≈ 6.6 – j108.5 Ω (|X|/R ≈ 16.4)

I don't know where to put the 6.6-j108.5 Ohm yet. Did you try to measure into the output of the transmitter to get the actual output impedance?

Your matching network (200 nH / 75 pF / 30 nH / 1.8 pF) does not seem to load the transmitter with anything close to the recommended value and also has unfavourable highpass characteristic with negligible suppression of harmonics.

 

For Reference: All range-tests were run with the output-power level fixed at 8 dBm (as per “Table 108, RFCR2” in UM11227). Received power was compared on two independent receivers: our in-house 434 MHz receiver and an RF Explorer Standard with a well-characterised 50 Ω dipole, so everything was measured over-the-air, not cabled to the trace.

NXP-recommended match – poor range
On the first board I tried the impedances from the TPMS slides, (434MHz of slide 5 and three versions of 434MHz of slide 6). All four versions gave short range with the 50 Ω dipole.

I don't know where to put the 6.6-j108.5 Ohm yet. Did you try to measure into the output of the transmitter to get the actual output impedance?

Reverse-engineered 50 Ω match – how I got there

• Test method – board powered from the final CR2477 and screwed into the product enclosure. Firmware keeps the RF-pin VREG charged but never sends data, so the VNA sees the “transmit-ready” bias with practically no large-signal drive.
• Choke & DC-block chosen to be transparent at 434 MHz
  • XL>5⋅Z0X_L > 5·Z_0XL>5⋅Z0 → L≈92nHL ≈ 92 \text{nH}L≈92nH; nearest high-SRF part on hand: 200 nH (Murata LQW18ASR20J0ZD).
  • XC≤Z0/10X_C ≤ Z_0/10XC≤Z0/10 → C≈74pFC ≈ 74 \text{pF}C≈74pF; used 75 pF (QCCP501Q750J1GV001T). S11 before and after these parts was almost unchanged.
• Raw PA impedance – with every PI pad open and the conditions above, probing at Z6 toward the MCU gave Z_in ≈ 6.6 – j108 Ω.
• Matching network – the antenna was left NC and its pads were removed during matching so nothing downstream disturbed the VNA; Z3 was bridged with 0 Ω; the probe sat at the end of the RF trace. After sweeping many values and trying L-topologies, the best set was Z4 = 30 nH (Murata LQW18AS30NG0ZD) to ground, Z6 = 1.8 pF (Samsung CL10C1R8BB8NNNC) in series, Z5 = NC, giving SWR ≈ 1.5 into 50 Ω (measured with NanoVNA)
  
  With ideal components:
  

Field results
With that one-PI network the link budget and range were consistently better than any NXP-slide match, and the improvement held when I repeated the tests on several antennas: the removable 50 Ω dipole, a couple of λ/4 whips, and the original on-board chip antenna (new PCB with the pads re-attached, of course).

Given this, I’d like to understand where the NXP-style load might have gone wrong, because the small-signal VNA method above clearly outperforms it in practice. Any insight is welcome.

 

I’m already planning a new PCB revision:

• move the DC-block to AFTER the first PI network (the topology most guides recommend);
• shorten the RF trace to cut losses and drop the second PI completely;
• add a SAW filter right before the antenna to clean up harmonics.

When that board comes back I’ll redo both the NXP match and my own 50 Ω match, this time with the high-Q parts I’ve ordered, and—before any range tests—I’ll tap the trace with a pick-off lead into the spectrum analyser to log the raw RF power, so antenna performance doesn’t cloud the numbers.

Just a reminder: I never took an EE degree—everything I know about RF comes from reading app-notes, tutorials, and the year of hands-on work on this project—so my lab is basic: NanoVNA + cal kit, RF Explorer Standard SA, a handful of 3–20 dB inline attenuators, 50 Ω terminations, a few fixed LC filters, and the usual SMT passives. Any advice or corrections are genuinely appreciated.

 

NXP-recommended match – poor range
On the first board I tried the impedances from the TPMS slides, (434MHz of slide 5 and three versions of 434MHz of slide 6). All four versions gave short range with the 50 Ω dipole.

It is easy to check if the matching does or doesn't work as intended by replacing the antenna with a spectrum analyzer and measuring output power. What output power(s) did you achieve with your implementation vs. the recommended NXP matching?

XL>5⋅Z0X_L > 5·Z_0XL>5⋅Z0 → L≈92nHL ≈ 92 \text{nH}L≈92nH; nearest high-SRF part on hand: 200 nH (Murata LQW18ASR20J0ZD).

The applied thumb rule is fine. Problem is that at or close to the RFout pin you actually have a very large "Z0" and don't reach Z0=50 Ohm until after the matching network. This makes the choke, even the larger one, far from transparent at 434 MHz.

Raw PA impedance – with every PI pad open and the conditions above, probing at Z6 toward the MCU gave Z_in ≈ 6.6 – j108 Ω.

S-parameters are only sufficient for characterizing small signal, linear amplifiers. The transmit power amplifier inside the NTM88 is neither of those things, which is why measuring with the VNA into the power amplifier will not result in any valid data pertaining to the output impedance or the optimal loading impedance for the amplifier/transmitter.

NXP used load-pull measurements to arrive at the recommended values. In principle, they connected a fancy, variable antenna tuner to RFout and stepped through every available load impedance while recording the power into a 50 Ohm load connected to the output of the tuner.

As already mentioned, the impedance data given by NXP makes sense. The assumed output impedance of the transmitter is Zout = 154 - j241 Ohm or 531 Ohm || 1.08 pF, based on the recommended optimal load for max. output power of 8.6dBm @ 434 MHz,. After compensation of the reactive part, you are left with RL=531 Ohm. The output power into RL, with Vdc = 3 V and assuming a transistor saturation voltage Vsat = 0.2 V, is Pout = (Vdc - Vsat)² / (2 * RL) = 7.4 mW or 8.7 dBm.

Below a simple matching network example for the recommended load. It uses a combination of a short 50 Ohm transmission line in series with an inductor to directly step down to 50 Ohm. DC is supplied at the 50 Ohm port through a 15nH inductor that is part of a 434MHz resonant circuit. A 1nF Capacitor is used as DC block. The network can be extended to also include parasitics contributed by the lumped components and the PCB layout.