When the gate voltage is 5V, Vd is fractions of a volt. The math says this should be a FET in triode mode, Vgs-Vth>Vds.

Correct.

 

Correct.

...but it's saturated, not in triode mode. Hence my question.

 

Why do you think so?

 

...but it's saturated, not in triode mode. Hence my question.

If you've already convinced yourself it's not in triode mode, then why ask if it's in triode mode?

 

http://zone.ni.com/cms/images/devzone/tut/a/a298dcae1272.gif which part of the curve do you think this case is about?

 

http://zone.ni.com/cms/images/devzone/tut/a/a298dcae1272.gif which part of the curve do you think this case is about?

Take the Vgs=3V curve. When Vds<3V, it is linear mode. But when the FET is ON, Vds is nearly 0.

 

Take the Vgs=3V curve. When Vds<3V, it is linear mode. But when the FET is ON, Vds is nearly 0.

Did you not notice that the triode region extends all the way down to Vds almost = 0?

 

Did you not notice that the triode region extends all the way down to Vds almost = 0?

Yes, so an "ON" fet is operating in the triode region?

 

Yes, so an "ON" fet is operating in the triode region?

Yup.

 

Yup.

Really!?

Then according to the math, in triode mode: \(r_{ds}=\frac{1}{2k(V_{gs}-V_{th})^2\), let's say \((V_{gs}-V_{th})=5V\).
Then the FET's k value to get an rds value of, say, .01 ohms is:
\(k=2 \frac{A}{V^2}\).

Is that right?

 

Look at the equation on page 65 for rds. How did you get the one you posted?

http://www-ferp.ucsd.edu/najmabadi/CLASS/ECE60L/02-S/NOTES/FET.pdf

 

Can anybody address post #18?

The definition of saturation is different between a BJT and a FET (just to confuse us all).
Saturation for the BJT means it is fully on with low resistance as a switch.
Saturation for a FET means it is in the high impedance (constant-current or triode) part of its operation where the current is proportional to Vgs.
When a FET is fully on with low resistance Rds it is in the Linear Region not the Saturation Region.

 

The definition of saturation is different between a BJT and a FET (just to confuse us all).
Saturation for the BJT means it is fully on with low resistance as a switch.
Saturation for a FET means it is in the high impedance (constant-current or triode) part of its operation where the current is proportional to Vgs.
When a FET is fully on with low resistance Rds it is in the Linear Region not the Saturation Region.

Now that I think about it, that is correct, and I did have the terms saturation and linear mode reversed. The characteristic curve is quadratic from Vgs≥Vth up to Vgs≤Vgs(on) and it becomes linear after that.

 

MikeML's plot illustrates my question just fine. When the gate voltage is 5V, Vd is fractions of a volt. The math says this should be a FET in triode mode, Vgs-Vth>Vds.

Yes, transistor is in triode mode.
Triode mode = full ON MOSFET and Id = Vdd/(Rd + rds(on)) ≈ 40V/10Ω ≈ 4A
So what you do not understand here ?

 

You are assuming that all of the device can operate at all of its maximum parametric values at the same time. It cannot. The part has a max voltage, a max current, and a min resistance, but not all at the same time. So if it is rated for 100 V and 10 A, that does not mean that it can operate with 100 V Vds and 10 A Id at the same time. That would be 1000 W power dissipation in the device, and it would fail almost instantly. If the part is rated for 100 W, then when it has 100 V across it it can sink only 1 A before exceeding its thermal rating. Or it can sink 10 A, but only if Vds is less than 10 V. Voltage, current, and power are the three limits that must not be exceeded.

ak

The term you're looking for is SOA (safe operating area).

 

Edit: stupid post. Don't mind me, nothing to see here.

 

Sorry for late response, I'm good now. Thanks for the help!