您好，我用的是LT1028，做超低噪声前置放大器。不知道我的SCH（电路图）有没有问题？请帮我检查一下，谢谢！

 

hi YYY,
Welcome to AAC.
What are the input signals and application of the circuit?
E

 

你好，ericgibbs，
该电路的输入是一对差分信号，它们来自前级电路。

 

hi Y,
This LTSpice plot shows the frequency response of your OPA circuit.
E

 

Hi, ericgibbs,
Thanks for checking! Hope it works well. Thanks again!
Y

 

Hello, I'm using LT1028 for an ultralow noise preamp. I wonder if there are any problems in my SCH. Please check, Thanks!
View attachment 356213

That's an expensive way to listen to the noise of those resistors.
5.1k resistor has a thermal noise of √(4ktR) V/√Hz which calculates to 9.15nV/√Hz
And the LT1028 is not particularly quiet when it comes to current noise. 1pA/√Hz will give 5.1nV/√Hz at the input.
So the total contribution from the current noise and resistors will be 14nV/√Hz compared to the 1nV/√Hz advertised voltage noise which was why you spent £9 on it! You might as well have bought a LF351 at 18nV/√Hz which would have only got to 22nV/√Hz by the time you have added the resistor noise.

 

When designing ultra-low noise preamps, a low-Z is your best friend.
And that is the reason for adding a discrete JFET front end in the first place, to have a reasonable input impedance.

Speaking of the JFET diff-amp; are you sure it is drawn correctly? I had never seen this configuration, have you actually built and tried it?

 

Hi, lan,
Thanks for suggesting! Actually, I know a little about noise. I found a paper and it describes the theory of the circuit and its calculation, testing are very detailed. So I try to reproduce the circuit and see how it works on noise.
Here is the simulation of output noise density, exported from LTSpice :
View attachment 356250
And the magnification of this circuit is about 3000(the first stage Av of single JFET: gm*R2≈14mS*2.2kΩ=30.8; the second stage: 100), after calculating the input noise will be steadily 1.5nV/ √Hz@1kHz.
The result of simulation seems well. So I decided doing it. So far, I have tested the magnification of first stage circuit, it matches well with calculation. If LT1028 works well, I will test the output noise of the whole circuit.
Besides, your calculation of resistor and current noise is very reasonable. I don't understand why it so different from my simulation. Obviously I should learn more about it.
Thanks for your detail reply!
Y

 

Hi, schmitt trigger,
Yes, I have built the circuit and tested its magnification, it matches well with calculation. If LT1028 works well, I will test the output noise of the whole circuit.
Y

 

Hi, E,
Sorry to border you. Unfortunately, it seems that the LT1028 doesn't work well.View attachment 356525
The yellow wave and the green wave are the outputs of JFET, they are sent to LT1028 through net VD1 and VD2. These two signals basically the same to simulation. The blue wave is the output of LT1028. It seems that's a dc signal but it has pk-pk value. That's so confusing. I don't know what's wrong with the circuit. Can you please help me checking it? I would really appreciate it. Hope to receive your reply!
Y

 

Hi YYY,
No problem.
Please post the frequencies and amplitudes of the signals from the FET's, they are difficult to read from your plots.
E

 

Hi, E,
Thanks for your quick reply! Here are the the frequencies and amplitudes of the signals from the FET's. The input of the whole circuit is a pair of differential signals, amplitude: 5mV and frequency: 1kHz.
View attachment 356527
The circuit is a little different from the sch. The static operating point of JFET is VD=10.6V, ID=2mA, when the power supply is 15V. My Li-ion batteries are 16.2V and VD measured 11V. To keep ID close to 2mA, I changed R2 to 2.5k. Others are the same to sch.
Y

 

hi YYY,
It works OK in simulation on the original circuit.
Please post your new circuit and I will try it.
E

 

你好，E，
这是我的新电路。LT1028 的输出应该是这样的。但我不知道为什么它在示波器上显示是一条直线。

是

 

Hi Y,
There is no input signal to the OPA????
E

The FET amp is not working

 

That looks to me as though it should work. Is it the generic NPN transistor? I never trust those: I always put in a real model.

 

hi Ian,
Tried a sim using 2n2222 in place of the generic, same result.

E

 

Perhaps the NPN transistors need to be biassed with the bases at a more negative voltage. LSK389 has a rather low pinch-off voltage for a JFET. The voltage on the drains won't go below -0.3V and there is 0.2V across the 100Ω resistors. It all seems a bit close for comfort. And I'm rather puzzled by the two extraneous diodes which seem to be part of the JFET pair in the TS's original schematic.

 

hi Ian,
Just run a number of tests on that LSK389C, it indicates a defective model.

E

 

hi YYY,
This is your circuit with an alternative jFET.
E