Hi:

I have attached a schematic for a Class AB amplifier. I am looking at Q2. The bias current flowing into the base is 131.446 μA, the
current flowing into the collector is 14.272 mA and the current flowing out of the emitter is 14.403 mA. The model for transistor
Q2 has a dc beta of 100 and when I look at the sim for this circuit, the dc beta is 109!

Using IB * β = 131.446 μA * 100 = 13.145 mA, not 14.272 mA.

Using IB * β = 131.446 μA * 109 = 14.328 mA, not 14.272 mA.

Neither dc beta results in an IC of 14.272 mA.

This is confusing.

aac

 

How did you determine the model of the part has a DC Beta of 100? And Ic = IB * β is a first order approximation at a specific set of conditions. A simulation program will likely take it a little deeper.

 

How did you determine the model of the part has a DC Beta of 100? And Ic = IB * β is a first order approximation at a specific set of conditions. A simulation program will likely take it a little deeper.

hi:
I went into the model and set the dc beta to 100. Actually its just a normal 2N3904 with the dc beta set to 100.
aac

 

hi:
I went into the model and set the dc beta to 100. Actually its just a normal 2N3904 with the dc beta set to 100.
aac

That value is only for one specific collector current.
The dc Beta varies with collector current, so will likely be different for the current in your simulation.

 

try measure it so the collector current is in between 500mA ... 1.5mA
about :: http://chpsndtch.blogspot.com/2019/06/determining-near-to-exact-h-fe-value.html
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Below is the LTspice simulation of a standard 2N3904, with the model having a specified Beta (BF) of 100, showing the Beta current gain (blue trace, right scale) versus the collector current (yellow trace, left scale).
Horizontal axis is the base current.
It shows the nominal Beta of 100 at an Ic of 1.3mA.

Note that the simulation was done at a Vce of 1V, the same as where the data sheet value was specified.
Any change in that voltage will also cause a change in the calculated gain due to the finite output impedance of the transistor.

 

Below is the LTspice simulation of a standard 2N3904, with the model having a specified Beta (BF) of 100, showing the Beta current gain (blue trace, right scale) versus the collector current (yellow trace, left scale).
Horizontal axis is the base current.
It shows the nominal Beta of 100 at an Ic of 1.3mA.

Note that the simulation was done at a Vce of 1V, the same as where the data sheet value was specified.
Any change in that voltage will also cause a change in the calculated gain due to the finite output impedance of the transistor.

View attachment 198778

Thanks crutschow. I will try to wrap my brain around this. May have to bug you again tomorrow.

aac

 

It's common for those learning electronics to think that the operational parameters of a transistor are fixed when they are not.
So the current gain and the base-emitter voltage, among other parameters,do vary with the operating conditions.
For example, it's commonly stated the Vbe of a BJT or the forward drop of a silicon junction diode is 0.7V, but that's only for typical operating conditions (usually for a collector or diode current of a few mA).
Those voltages actually are a logarithmic function of the current, and thus can significantly vary with that current.

 

I'll put in my two cents.
The amplification of the transistor changes not only from the current but also from the collector-emitter voltage. In the spice model, that's the voltage of Earley-- VAF. More voltage is more amplification.

 

Using this stetemnt .model 2N3904JP NPN ( BF = 100 IS = 1E-14) the current gain will be equal to 100.

 

Using this stetemnt .model 2N3904JP NPN ( BF = 100 IS = 1E-14) the current gain will be equal to 100.

So that gives a more or less ideal transistor model.

 

the spice transistor models do account many dynamic parameters - that and in realistic devices - affect the value of ß . . . it should not stay constant - even when the transistor has designed to have a fixed ß over a wide operating range

about : http://www3.imperial.ac.uk/pls/portallive/docs/1/7292572.PDF
______________

https://www.researchgate.net/public...ntional_Gummel-Poon_bipolar_transistor_models

https://www.researchgate.net/figure...nt-gain-of-the-BJT-under-forward_fig6_3063893

https://www.researchgate.net/figure/fig1_3063893

versus -- The bipolar junction transistor model is an adaptation of the integral charge control model of Gummel and Poon. This modified Gummel-Poon model extends the original model to include several effects at high bias levels, quasi-saturation, and substrate conductivity.Sep 21, 2011
ltwiki.org › title=Q_Bipolar_transistor

 

the spice transistor models do account many dynamic parameters - that and in realistic devices - affect the value of ß . . . it should not stay constant - even when the transistor has designed to have a fixed ß over a wide operating range

about : http://www3.imperial.ac.uk/pls/portallive/docs/1/7292572.PDF
______________

https://www.researchgate.net/public...ntional_Gummel-Poon_bipolar_transistor_models

https://www.researchgate.net/figure...nt-gain-of-the-BJT-under-forward_fig6_3063893

https://www.researchgate.net/figure/fig1_3063893

versus -- The bipolar junction transistor model is an adaptation of the integral charge control model of Gummel and Poon. This modified Gummel-Poon model extends the original model to include several effects at high bias levels, quasi-saturation, and substrate conductivity.Sep 21, 2011
ltwiki.org › title=Q_Bipolar_transistor


View attachment 198895

thanks ci39