I need to make an oscillating graph for the capacitor voltage and output. When I had the capacitor connected to the - of the OP-Amp, I got a stable voltage, so I tried to make the Op Amp into a non-inverter, but now they become constant at equilibrium. What am I doing wrong?

 

My resistors had a space between the 4.7 and the units, and the conductor was supposed to be connected to the positive terminal.

 

Connect the circuit as shown, with C1 going to the (+) input.

The add the .op command to skip the initial operating point solution (below), which can otherwise cause the oscillator to be in a quasi-stable mode.

 

I need to make an oscillating graph for the capacitor voltage and output. When I had the capacitor connected to the - of the OP-Amp, I got a stable voltage, so I tried to make the Op Amp into a non-inverter, but now they become constant at equilibrium. What am I doing wrong?
View attachment 358315

You have to set this up so that when the output is high the cap charges to a higher voltage and when that higher voltage reaches the voltage at the junction of R1, R2, and R3, the output of U1 goes low. Then the cap starts to discharge while the other input switches state. When the cap voltage gets low enough, the output then switches state again and the cycle starts all over again.

This can only happen when the lead from C1 that goes to the noninverting input (+) of the op amp is disconnected and then connected to the inverting input (-) of the op amp. The lead going to the inverting input (-) in the schematic is changed also so that it goes to the noninverting input (+).
That's the way you create this kind of oscillator.

This is an oscillator that is kind of special because the frequency is independent of the operating voltage V1.
V1 cannot change too fast though or else it modulates the frequency mid-cycle. In your schematic that looks like V2 will modulate the total voltage, so V2 has to change slowly. If it changes fast, then one cycle could be unusual, if it gradually ramps up the frequency will gradually change with each cycle getting either shorter or longer which will mean the duty cycle will change slightly for each cycle. To get it to change abruptly you'd have to have a way of syncing the change in V2 to the very end of each cycle.

If it still does not work after these changes, then something else is wrong.

Another simple way to look at this is that R3 is supposed to be the hysteresis resistor and that is part of the mechanism that keeps the frequency constant with voltage. It cannot connect to the inverting input (-) or else the op amp would go into the linear mode and that would be harder to get to oscillate, if it ever could.

 

Agree - the inputs need to be swapped over.
But if it does not work - what is the power supply doing? SHould not be a pulse but DC.
What is the spec of the op amp- does it go rail to rail or is there a voltage limit - if so your PSU voltage needs to be higher than the voltage limit (e.g. if the op amp can only deliver voltages up to 3V from the supply lines then it needs to operate on at least 6V plus something so that the op amp can work properly.
Also set the initial condition of the capacitor to zero volts. That should start it off with a slightly longer delay before the frequency settles.

 

Agree - the inputs need to be swapped over.
But if it does not work - what is the power supply doing? SHould not be a pulse but DC.
What is the spec of the op amp- does it go rail to rail or is there a voltage limit - if so your PSU voltage needs to be higher than the voltage limit (e.g. if the op amp can only deliver voltages up to 3V from the supply lines then it needs to operate on at least 6V plus something so that the op amp can work properly.
Also set the initial condition of the capacitor to zero volts. That should start it off with a slightly longer delay before the frequency settles.

Hi,

The voltage is normally constant, like 10v or whatever, but it should not matter if you use a 10v source in series with a changing plus and minus 1v source for example, you should just see some unusual changes in frequency and amplitude on the output.

If the plus and minus 1v changes mid cycle, then the cycle will get either longer or shorter during that time. That's because the rule that keeps the frequency constant will not be in effect anymore as it depends on constant levels of Vcc/3 and 2*Vcc/3 to maintain a constant frequency. Changing 10v to 11v mid cycle means that one of those two is no longer the same.
Normally we would have a constant 10v which means those two levels wound be 10/3 and 20/3 which is 3.333v and 6.666v, but if the voltage changes to 11v during that second part, we'd see 3.333v and 7.333v which means that second level is not the same anymore. However, if the voltage then stays at 11v we would then see Vcc/3 and 2*Vcc/3 again which would be 3.666v and 7.333v which means the frequency would settle into a constant value again.
Theoretically, if Vcc changes from 10v to 11v at the very start of the cycle, then I would think the frequency would stay constant because then we again have the rule Vcc/3 and 2*Vcc/3 which keeps the frequency constant with a change in power supply voltage.

We could go over the derivation of these rules.