Hi all -I am involved in a project that requires a loopback test on an RS485 Transceiver. The device is Maxim Max491. It is a Full Duplex device (seperate Driver and Receiver) with seperate Driver and Receiver enable pins. The first configuration was to use a second Transceiver to implement the loopback - but I think that JFETS would be more cost-effective and take less room on the PCB.
I would like to implement a loopback using JFETs as switches between the Tx+/Rx+ and Tx-/Rx-. The JFETs (and the transceiver) would be controlled by the microcontroller by tying an I/O pin to the gate of each device (4 JFETs would be needed). I would also use a resistor to GND on each gate to bleed off any voltage when turning on each JFET.
The problem is that the micro is a 3.3 Volt device while the Transceiver is a 5 Volt device and the driver swing is from 0 V to ~5 V. Will the 3.3 V swing of the I/O pin be enough to pinch-off the JFETS? If not, the CPU I/O pins are 5 Vdc tolerant which means that I can pull them to 5 Vdc thru a resistor. Do you think that this will work for me? what would you suggest as a gate resistor for bleed-down?
I would like to implement a loopback using JFETs as switches between the Tx+/Rx+ and Tx-/Rx-. The JFETs (and the transceiver) would be controlled by the microcontroller by tying an I/O pin to the gate of each device (4 JFETs would be needed). I would also use a resistor to GND on each gate to bleed off any voltage when turning on each JFET.
The problem is that the micro is a 3.3 Volt device while the Transceiver is a 5 Volt device and the driver swing is from 0 V to ~5 V. Will the 3.3 V swing of the I/O pin be enough to pinch-off the JFETS? If not, the CPU I/O pins are 5 Vdc tolerant which means that I can pull them to 5 Vdc thru a resistor. Do you think that this will work for me? what would you suggest as a gate resistor for bleed-down?