Looking on advice on switching between two 555 Timers

Thread Starter

bigassbaguettes

Joined Jun 7, 2020
3
Greetings,

I am currently building a circuit that controls LEDs using a CD4017. I have used two 555 timers, first one to allow the user set the CD4017 to change automatically (astable), and the second one to allow the user to manually change the LEDs by sending a pulse (monostable).
However, I am not sure of the correct way to allow switching between the 555 timers. I am currently using a SPDT connected to the Vcc of both 555 to toggle on or off, but I am pretty sure this is the incorrect way.

Any reccomendations would be appreciated :D Thanks!
 

Hymie

Joined Mar 30, 2018
846
You could do this using a single 555 timer, in astable mode pins 2 & 6 are connected; by breaking this connection and adding a push switch to take pin 2 low, should do what you want.
 

dl324

Joined Mar 30, 2015
11,288
Welcome to AAC!

When you're describing circuits, even simple ones, we prefer that schematics be used. That way we don't have to guess whether you've actually connected things the way you describe.

You could use a multiplexer to select which timer output you want to go to the clock.
clipimage.jpg
Clk1 is selected when the switch is open. You'll need to debounce the switch if contact bounce causes undesirable behavior (extra clocks).

EDIT: R1 can be 10k for any supply voltage you're using for the CD4017.
 
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Thread Starter

bigassbaguettes

Joined Jun 7, 2020
3
You could do this using a single 555 timer, in astable mode pins 2 & 6 are connected; by breaking this connection and adding a push switch to take pin 2 low, should do what you want.
Welcome to AAC!

When you're describing circuits, even simple ones, we prefer that schematics be used. That way we don't have to guess whether you've actually connected things the way you describe.

You could use a multiplexer to select which timer output you want to go to the clock.
View attachment 209086
Clk1 is selected when the switch is open. You'll need to debounce the switch if contact bounce causes undesirable behavior (extra clocks).
Thank you for your suggestions! However, my circuit requires two separate 555 timers (astable and monostable) controlling two separate CD4017s, the user has an option to switch between either 555.

P.S. I will try to include schematics in the future :) Recommend any suitable software?
 

dl324

Joined Mar 30, 2015
11,288
Okay, thank you very much! This is just what I needed.
Here's another one chip solution using CD4007, but it requires more wiring.
clipimage.jpg
When clk is HIGH, in2 is selected.

This is from a collection of circuits I made using CD4007; the "A" designator indicates the package (in this case there's only one) and the numbers by the terminals are pin numbers. The MOSFET symbol is what I became accustomed to using when working with microprocessor/memory design. We could draw them faster than the usual device symbol and we didn't show the bulk connection (at least for digital logic). The device with the bubble on the gate is a P MOSFET.
 
Last edited:

WBahn

Joined Mar 31, 2012
26,073
Welcome to AAC!

When you're describing circuits, even simple ones, we prefer that schematics be used. That way we don't have to guess whether you've actually connected things the way you describe.

You could use a multiplexer to select which timer output you want to go to the clock.
View attachment 209086
Clk1 is selected when the switch is open. You'll need to debounce the switch if contact bounce causes undesirable behavior (extra clocks).

EDIT: R1 can be 10k for any supply voltage you're using for the CD4017.
That circuit is virtually guaranteed to produce clock glitches.

Imagine that clk1 and clk2 are both in a static HI state. So the output should be static HI no matter how many times you switch between clock sources, right?

Let's assume bounce-free behavior of the switch.

When S1 is closed, the output of the top AND gate is HI and the output of the bottom AND gate is LO, so the final output is HI.

Now what happens when the switch is opened?

The output of the top AND gate goes low after a short propagation delay but the path through the bottom AND gate has a longer total delay because the signal has to go through the inverter, too. So it will not go HI until after a longer propagation delay (the difference being roughly the propagation delay of the inverter). During this period the outputs of both AND gates are LO and so the output will go LO. That LO pulse will exist for about the propagation delay of an inverter, which is almost certainly more than enough time for any edge-sensitive logic to respond to it.

The behavior if the switch transitions near when one of the clock signals is even more problematic. So this circuit should only be used if it is determined that the behavior of the clock signals is unimportant near the switching events -- that it is okay if either additional clock pulses or missing clock pulses occur on the output.
 

atferrari

Joined Jan 6, 2004
4,069
Thank you for your suggestions! However, my circuit requires two separate 555 timers (astable and monostable) controlling two separate CD4017s, the user has an option to switch between either 555.

P.S. I will try to include schematics in the future :) Recommend any suitable software?
Draw one and take a picture if you have no software. Better than talking and talking.
Practice drawing simple schematics; it would be useful even for you.
 
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