Quite a long time ago (ten years or so) @bertus posted an article showing how you could use a 555 mono stable with a very large capacitor to get around the leakage issue. I will do my best to redraw it from memory but I was wondering where that post was?



I've wondered What keeps the internal transistor from blowing from charging the capacitor?

 

Hello,

Do you mean this post:
https://forum.allaboutcircuits.com/threads/alternative-long-time-555-monostable.173599/

Bertus

 

Yep that's the one. It also answered my cap discharge question, Thank You.

 

use a 555 mono stable with a very large capacitor to get around the leakage issue

Connecting it with the capacitor common to the supply voltage, means the leakage reduces the delay time instead of increasing, but that doesn't eliminate the problem of electrolytic capacitor leakage, which inherently limits the maximum RC time-constant.

And the capacitor reset transistor current is the same for either capacitor connection, so I see no need for the added resistor when the capacitor is connected to the supply voltage.

The only way to reliably get very large delay times is to use the 555 CMOS version with a large resistor, and a large, low leakage ceramic or film capacitor.

 

A LMC555 has better inputs. You can use much smaller currents. Higher value of resistors and smaller capacitors.

 

Connecting it with the capacitor common to the supply voltage, means the leakage reduces the delay time instead of increasing, but that doesn't eliminate the problem of electrolytic capacitor leakage, which inherently limits the maximum RC time-constant.

It eliminates the condition where the cap leakage current is greater than the charging current, so the cap voltage never exceeds the Threshold voltage. Yes, the leakage current still is an error term that needs to be included in the calculations, but for a different reason as it now is a parallel discharging current rather than an opposing charging current.

ak

 

And the capacitor reset transistor current is the same for either capacitor connection, so I see no need for the added resistor when the capacitor is connected to the supply voltage.

There is an initial surge through the discharge transistor when power is first applied.

 

So I redrew the Schematic. The discharge resistor needs to be as small as possible. If C= 1,000.00µF and the resistor is 10Ω and the Vcc is 15V the current would be 1.5A (not good), Even 100Ω would be a surge would be 0.15A which is also a nonstarter. However, a resistance of 1.0KΩ would require a trigger pulse of 1.4 seconds to fully discharge the cap, a lower Vcc will reduce this somewhat, but you still need to be aware.

 

The thing is even if the cap is leaky it is consistent on the timer, it works which is good enough.

 

The discharge transistor is rated 200ma for a NE555, a 100 ohm resistor is adequate.

 

Still, it's pushing the limits.

 

Yes, the leakage current still is an error term that needs to be included in the calculations, but for a different reason as it now is a parallel discharging current rather than an opposing charging current.

Yes, but it still makes long delays problematic and possibly far from the desired value.
Electrolytic leakage can vary significantly from unit-to-unit and from aging, so using the value in the calculations would require measuring it, and then hoping it doesn't change significantly with time and temperature.
The 555 input threshold leakage current of 0.25µA max. is also a factor that must be considered in the calculations.

 

I'm thinking if you combine the CMOS concept (bigger resistors with smaller caps) and the control voltage modification I use to change the threshold voltage from 2/3 to approx. 9/10 you could probably get really long times without having to worry about the leakage issue.

Accuracy be darned.

CV mod = feeding back the output to the CV pin for astable mode or tying the CV pin directly to the rail with a resistor for mono.

 

Thought I would use an astable plus a counter chain for long delays, the circuit above shows, once again, that the 555’s versatility and usefulness goes far beyond its original intent.

Hans Camenzind would be proud.

 

Yes, but it still makes long delays problematic and possibly far from the desired value.

Problematic - sure, but not possibly impossible.

ak

 

The resistor is easy enough to change once you know how far off it is, The length of the trigger pulse strikes me as the bigger issue. Of course a switch shorting the timing cap steps neatly around that issue.

 

The length of the trigger pulse strikes me as the bigger issue.

Why is that an issue?

 

Why encourage employing a very impractical strategy for making long delays?

I have experimented with this "Big Cap" idea and found it entirely frustrating- difficult to adjust, unstable, and inaccurate?

 

Of course you could always eliminate the long pulse trigger with a high power high current transistor, even then be aware that the surge may blow the transistor if the capacitor is really large.

 

Off topic,
I use the LTC6995-1/LTC6995-2 to get delays of 1mS to 9 hours without using a capacitor.