# Logisim exercise

#### ValentinNiculae

Joined Dec 1, 2022
3
Hi all,
Can anyone help me with the below exercise ?
I have to "Build a circuit that has two 8-bit two’s complement numbers U and
W as its inputs and a single 1-bit output R, which is 1 when W − U is
negative and 0 otherwise." In logisim
Thank you

#### ericgibbs

Joined Jan 29, 2010
18,641
hi VN,
Welcome to AAC,
E

#### ValentinNiculae

Joined Dec 1, 2022
3
Hi,
This is what I have done so far 8-bit incrementer subcircuit, 8-bit subcircuit adder, 8 subcircuit bit mux , the problem is if W-U is negative output should be 1 or otherwise 0 I cant think of anything elce to solve this please see attacher logisim file

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#### dl324

Joined Mar 30, 2015
16,672
For convenience, the aforementioned adder circuit:

#### WBahn

Joined Mar 31, 2012
29,850
Hi,
This is what I have done so far 8-bit incrementer subcircuit, 8-bit subcircuit adder, 8 subcircuit bit mux , the problem is if W-U is negative output should be 1 or otherwise 0 I cant think of anything elce to solve this please see attacher logisim file
How can you subtract one two's complement number from another number using an adder?

#### KAlex610

Joined Apr 9, 2023
6
Hi,
This is what I have done so far 8-bit incrementer subcircuit, 8-bit subcircuit adder, 8 subcircuit bit mux , the problem is if W-U is negative output should be 1 or otherwise 0 I cant think of anything elce to solve this please see attacher logisim file
Did you solve it ??