If we take a 2-input NAND or a 2-input NOR gate and tie the inputs together to a single input line in both cases, determine using a truth table how both type of gates would behave (i.e. is it like a different type of gate)? Using only the same NAND or NOR gate, examine the truth table for both gates and determine how could we get an equivalent behaviour using a different wiring configuration on the input side for both NAND and NOR gates?