Hey everyone,

I have been running some simulations of JFETs in order to study a bit about how to bias JFETs properly and also to teach myself along the way. I'm having problem with some of my calculations though. I am currently able to accurately calculate the operating point of a simple JFET circuit so long as it only has a source resistor. However, I've noticed that as soon as the drain resistor gets large enough to limit the current to be lower than the expected current draw for some source resitor and Idss value, then the operating point of the transistor becomes elusive and strange to me and I'm unable to calculate it. I feel that it has something to do with changes in drain-source voltage drop (maybe gate-source too?) but I can't figure out exactly how to calculate it accurately.

Similarly, I am confused as to how to bias a JFET well enough as to basically negate the differences between individual components - similar to how you can by using a voltage divider bias network for a BJT.

Help?

 

I think you are not accounting for pinchoff voltage.

 

It is true that a lack of enough drain voltage changes the way a jfet works. I think it's called the saturation region. It's over on the left side of the graph for Id/Vgs.

I just make sure the jfet has enough voltage to work with, but I'll be watching in case you get it figured out. I would like to learn the same things. There is a way to get class a operation across a wide range of Idss but calculating how to get a batch to work with minimal drain voltage escapes me.

 

It is true that a lack of enough drain voltage changes the way a jfet works. I think it's called the saturation region. It's over on the left side of the graph for Id/Vgs.

I just make sure the jfet has enough voltage to work with, but I'll be watching in case you get it figured out. I would like to learn the same things. There is a way to get class a operation across a wide range of Idss but calculating how to get a batch to work with minimal drain voltage escapes me.

Saturation is where you want the JFET to be for small signal amplification. Under my simulations I am still in that region, but the current output is lower than the maximum possible. I can not find a way to accurately calculate the relationship though.

 

I think you are not accounting for pinchoff voltage.

Sorry, didn't mention that. I have though. It's not in the pinchoff region. Under my simulations it is still operating in the saturation region but I can't understand the current draw.

 

Adding some clarification.

For an example, let's say my JFET circuit is as such:
Vdd = 10V
Rs = 1k ohms
Rd = 0 ohms
Idss = 10mA
Vp = -4V

In this case I calculate on paper that Id will be 2.15mA, and when I simulate it then that is correct. However, as soon as I add a drain resistor of around 3k ohms or more to the same circuit, Id decreases in a way that I am unable to predict or calculate. Why?

EDIT: It appears that it is entering the linear region, which answers my question... sort of... still a little confused on how to choose the correct value for a drain resistor or how to stabilize a circuit against changes in Idss

 

From my textbook:
\(R_{D}\)=(\(V_{DD}\)-\(V_{DS}\)-\(I_{D}R_{S}\))/\(I_{D}\)
VDS is chosen, not calculated, it is one of your design parameters.
ID is also chosen, not calculated, it is another design parameter.
RS is calculated, RS=-VGS/ID
VGS is also calculated using ID, IDSS and VP.

So to find RD you would have VDD that is known, VDS that is known, ID that is known, and RS is calculated. That is how you find RD.

Your problem is that you work backwards. What you should do is pick ID and VDS that you want, and that will allow you to design circuit to meet those desired quantities. The RS and RD are calculated during the process.

 

.........However, I've noticed that as soon as the drain resistor gets large enough to limit the current to be lower than the expected current draw .......

Commathe, just for a better understanding of transistor operation:

It is a common misconception that it is the task of the drain resistor (resp. the collector resistor in BJT amplifiers) to "limit the current".
In fact, this is not the case. You should be aware that the drain current is NOT determined by the drain resistor in conjunction with the power supply following Ohm´s law. Rather, the transistor acts as a current source (ID=f(VGS))and the drain resistor acts as a load (producing the output voltage).

 

It is a common misconception that it is the task of the drain resistor (resp. the collector resistor in BJT amplifiers) to "limit the current".
In fact, this is not the case. You should be aware that the drain current is NOT determined by the drain resistor in conjunction with the power supply following Ohm´s law. Rather, the transistor acts as a current source (ID=f(VGS))and the drain resistor acts as a load (producing the output voltage).

From my textbook:
\(R_{D}\)=(\(V_{DD}\)-\(V_{DS}\)-\(I_{D}R_{S}\))/\(I_{D}\)
Your problem is that you work backwards. What you should do is pick ID and VDS that you want, and that will allow you to design circuit to meet those desired quantities. The RS and RD are calculated during the process.

Thanks to both of you. This helps a lot!