I've spent the last few days playing with Jfets in LTspice.
They seem to operate on principles I don't understand, at least in LTspice.



As far as I understand a Jfet is not much different than a mosfet in the way it is basically a "hose" for current that can be opened and closed.

The gate has a high impedance and it can't withstand much more than a few volts difference between it and the source, and an N channel jfet needs its gate voltage to be equal to or less than the source voltage.

One of the things I noticed was that in simulations the gate often carries a lot of current through it, even when reverse biased.
The above schematic has 45 amps flowing through the gate.

Depending on the model of Jfet it can have a whole lot of current flowing through the gate but no, very little, or a lot (but not enough) of current being shunted. If I make R2 a high value not much current flows through the gate but then no current is shunted either. If I don't have R2 there then the gate will be forward biased.
The amount of current the jfet shunts seems to vary strangely between the jfet models. The only jfets that can handle these kinds of conditions are SIC jfets but the LTspice models are not SIC.
That being said I assumed the "no name" default jfet was considered a "perfect" jfet but it passes no current.
Maybe it's LTspice being weird? Jfet's shouldn't pass current through the gate when they are reverse bias and they should be able to act just fine as a shunting element right?

 

I've spent the last few days playing with Jfets in LTspice.
They seem to operate on principles I don't understand, at least in LTspice.

View attachment 101738

As far as I understand a Jfet is not much different than a mosfet in the way it is basically a "hose" for current that can be opened and closed.

The gate has a high impedance and it can't withstand much more than a few volts difference between it and the source, and an N channel jfet needs its gate voltage to be equal to or less than the source voltage.

One of the things I noticed was that in simulations the gate often carries a lot of current through it, even when reverse biased.
The above schematic has 45 amps flowing through the gate.

Depending on the model of Jfet it can have a whole lot of current flowing through the gate but no, very little, or a lot (but not enough) of current being shunted. If I make R2 a high value not much current flows through the gate but then no current is shunted either. If I don't have R2 there then the gate will be forward biased.
The amount of current the jfet shunts seems to vary strangely between the jfet models. The only jfets that can handle these kinds of conditions are SIC jfets but the LTspice models are not SIC.
That being said I assumed the "no name" default jfet was considered a "perfect" jfet but it passes no current.
Maybe it's LTspice being weird? Jfet's shouldn't pass current through the gate when they are reverse bias and they should be able to act just fine as a shunting element right?

Spice will let you break a component if you want to. Try running it within it's data sheet specs and see if it doesn't act better.
http://www.onsemi.com/pub_link/Collateral/2N5486-D.PDF
Why not use an enhancement mode FET?

 

Why not use an enhancement mode FET?

Mainly because I'm trying to make a very high voltage, very low output impedance shunt regulator and the only fets that have super low RDS at super high voltage and power capabilities are SIC fets.
SIC devices don't come in P type yet so that pretty much leaves me with N Jfets.

Also because Jfets are quieter and many people claim they "sound" better.

The shunt regulator I'm trying to make will be on a 600v pre-regulated bipolar supply and will pass a maximum of 100ma but shunt a maximum of 600ma, maybe more if I feel like going for redundancy for uber low output impedances.

Try running it within it's data sheet specs and see if it doesn't act better.

Aha! that did the trick. Sucks I can't test it at my intended parameters, I always thought the default unnamed jfet was "perfect" and would work under any circumstance, I guess not.
Thanks for the help there

Now I have another question

I cannot figure out how to get a Jfet to function as a constant current source in this configuration without putting a resistor between the current source and the load.
The whole point of me wanting to use a shunt regulator is because the more current it shunts, the lower the output impedance. I've read output impedances below 1 miliohm are common, so I don't want to go adding a series resistance.

Is there a non-invasive way of setting J2 as a CCS?

 

Mainly because I'm trying to make a very high voltage, very low output impedance shunt regulator and the only fets that have super low RDS at super high voltage and power capabilities are SIC fets.
SIC devices don't come in P type yet so that pretty much leaves me with N Jfets.

Also because Jfets are quieter and many people claim they "sound" better.

The shunt regulator I'm trying to make will be on a 600v pre-regulated bipolar supply and will pass a maximum of 100ma but shunt a maximum of 600ma, maybe more if I feel like going for redundancy for uber low output impedances.


Aha! that did the trick. Sucks I can't test it at my intended parameters, I always thought the default unnamed jfet was "perfect" and would work under any circumstance, I guess not.
Thanks for the help there

Now I have another question
View attachment 101783
I cannot figure out how to get a Jfet to function as a constant current source in this configuration without putting a resistor between the current source and the load.
The whole point of me wanting to use a shunt regulator is because the more current it shunts, the lower the output impedance. I've read output impedances below 1 miliohm are common, so I don't want to go adding a series resistance.

Is there a non-invasive way of setting J2 as a CCS?

Play with this:
I put some ripple on the suppy and a step in current on the output.

 

Unfortunately I'm kind of set on a CCS fed shunt regulator. The amount of heat the resistor will need to dissipate will be crazy, among other things.

The shunt element will be controlled digitally to act as a CCS to the load (still figuring out a non invasive technique for that).

I saw a schematic that looked like it had a CCS being biased by another off-loaded CCS. I copied it but it didn't work with a Jfet.

 

Can someone explain this circuit to me? It may be the key to solving my plight.

To my eyes it seems to be a cascoded current source that is biasing the main current source. It works with a mosfet but not with a Jfet in spice.
Is this another BS messup with the simulation or is there a reason this would not work with a Jfet?

 

The simulation is likely correct.
A JFET is a depletion-mode device, not enhancement like most MOSFETs, and is fully-on when Vgs is 0V, so it's apparent that just substituting a JFET for a MOSFET won't work.
To turn an N-JFET off requires that Vgs be negative.

 

The circuit shown provides bias such that M2 gate is more positive than its source, so M2 conducts and forms an approximately constant-voltage drive to a load.
If M2 is replaced by a N-channel depletion-mode JFT the gate voltage should be more negative than the source if the JFT is to provide control over the load current. In the configuration shown, the JFT would form an approximately constant-current drive for a load.

 

Unfortunately I'm kind of set on a CCS fed shunt regulator. The amount of heat the resistor will need to dissipate will be crazy, among other things.

Your right of course. But if you are doing a shunt regulator something is going to dissipate that heat. Making it a FET doesn't change that.

The shunt element will be controlled digitally to act as a CCS to the load (still figuring out a non invasive technique for that).

I thought you were making a power supply for an audio amp. Why would you want constant current for that? I would think you would want constant voltage and low ripple.
If you just want to use the expensive FETs please just say so.



[/QUOTE]

 

A JFET is a depletion-mode device

Oh, right, totally forgot about the depletion mode thing, duh. I guess I could do this

but from what I read it has its own problems.
Is there a way to adapt the"current source bias" for depletion mode? I'm not quite there yet to be able to make come up with something.

I thought you were making a power supply for an audio amp. Why would you want constant current for that?

Because the power supply would be used to power constant current sources which feed tube cathodes anyway.
I figure it would be better to skip the middle man and feed the cathode directly from the super low impedance power source.

 

How will the tube amplify if the cathode current is constant?

 

Because tubes are voltage amplifiers. Setting a constant current on the cathode or the plate gives a horizontal load line. It's a common practice and usually preferred.

 

an N channel jfet needs its gate voltage to be equal to or less than the source voltage.

There is the answer. In your schematic the gate is trying to be 500 V *greater* than the source voltage. By your own statement this will not work.

Jfet's shouldn't pass current through the gate when they are reverse bias

Your gate is forward biased.

ak

 

I'm having a difficult time grasping how the source is not at a higher potential than the gate.
If I load up a Jfet source follower in LTspice the source is at a higher potential automatically, but when I use it in a circuit the opposite happens.
The circuit above shows the CCS in source follower configuration.

No matter what voltage is applied to the above circuit gate the source is always at a lower potential. I wonder if this means what I'm trying to do is impossible without a mosfet/jfet cascode?
I've read that cascoding mosfet/Jfet to create a normally off Jfet can easily oscillate and wouldn't it also increase the noise and effective RDS?

 

Mainly because I'm trying to make a very high voltage, very low output impedance shunt regulator and the only fets that have super low RDS at super high voltage and power capabilities are SIC fets.

So? The transistor will come nowhere near being fully on, or it would completely short out the power source. A shunt regulator is not a super low resistance to GND. It is a super low *impedance at audio frequencies* to GND. These are very different things. At DC, the shunt element is simply a resistor, part of a 2-resistor voltage divider.

The shunt regulator I'm trying to make will be on a 600v pre-regulated bipolar supply and will pass a maximum of 100ma but shunt a maximum of 600ma, maybe more if I feel like going for redundancy for uber low output impedances.

600 mA through the shunt plus 100 mA to the load equals 700 mA. Therefore, at DC, the shunt leg effective resistance will be 1/6th of the effective resistance of the load circuit.

The whole point of me wanting to use a shunt regulator is because the more current it shunts, the lower the output impedance.

Not automatically true. It depends on both the relationship between the shunt current and the load current, AND the bandwidth of the control loop that is driving the shunt element.

I've read output impedances below 1 miliohm are common, so I don't want to go adding a series resistance.

The impedance of the shunt element and the impedance of the voltage/current source that is the input to the regulator do not combine in this way to affect the regulator circuit's output impedance at audio frequencies.

ak

 

The impedance of the shunt element and the impedance of the voltage/current source that is the input to the regulator do not combine in this way to affect the regulators output impedance at audio frequencies.

Eurika, thank you! That is what I wanted to hear. Wow this makes things much easier!

Not automatically true. It depends on both the relationship between the shunt current and the load current, AND the bandwidth of the control loop that is driving the shunt element.

Do you have any more wisdom for me on this matter?

 

Sticking to positive voltages, a traditional solid state voltage regulator is an emitter follower preceded by a lot of control stuff. It is the push half of a push-pull output stage. In one sense, it is a voltage-controlled variable resistor. This means that if the load increases rapidly it can pump out more current as fast as its control loop allows it to to maintain the desired output voltage. A lot of that current goes into charging up capacitors. When the load current suddenly decreases, all the regulator can do is shut off the electron supply. As the regulator is supplying less current, its effective series resistance increases. So the power supply has an output impedance that varies as a function of the frequency and amplitude of the audio signal. This is not good for just about any analog circuit design, because they all assume that the power source has a zero ohm impedance at all frequencies of interest. This can be a form of positive feedback, which is why all power amplifier ICs are so whacko about power supply decoupling.

A shunt regulator is more like a class A output stage with a constant current pull up (medium to high circuit impedance) and a common-emitter pull down (very low circuit impedance).

ak

 

Ah thank you now it makes more sense. So the current source is considered a high impedance either way?

 

A current source is not just a source of current. "Current source" is a clearly defined electronic circuit function. When well done, it emulates the current available from an infinite voltage source through an infinite resistor. Of course circuits built with real world parts have a problem reaching infinite anything, but it is not difficult to have a circuit emulate a 1 megohm output impedance.

ak