Hi,
I am hoping I may be able to get some guidance and or ideas in identifying a problem I have with an instrumentation amplifier I have designed.

I have simulated the design in Circuit Lab, however I am not getting the expected output as desired during a DC sweep.
Essentially, I have a voltage difference test circuit which simulates a transducer. On the high side there is 1.4615 volts and the the low side 1.4585 volts, therefore there is a difference of three milliVolts (0.003 mV). I am trying to to achieve five volts output from the IA, therefore I have a gain of 1666.666. I have performed the amplification in two stages, the amplifier with a gain of 1000 and the remainder handled by the input circuit and RG.
I have introduced two summing amplifiers to remove the DC offset coming from the input stage.
When I run a time domain simulation I achieve the 5 Volt output as desired, however If I perform a DC sweep across the resistor in my test circuit R2 Vs the amplifier output, the output voltage does not begin from zero volts, rather the output only drops as low as 4.664 Volts, at R2 equal to zero ohms and 5 volts at 43 ohms.

I am wondering if there is problems with my DC offsets, however I am unsure what to expect as I have not implemented summing amplifiers in the instrumentation circuit before. They may be misplaced.
Initially what I did was set the DC offset at V4 for zero volts and V3 for 0.003 mV, but I was unable to see a change in the output. After further adjustments I set V3 for 2.48 mV which gave me a 5 Volt output when I performed a time domain simulation, but still have problems with the DC sweep.

Anyway that is a fairly big description which I hope is clear. I have attached my schematic, and have provided the voltages of various test points below, along with some graphed simulations. I would appreciate some feedback so I can get the circuit working as expected.

V1 = 1.4615 V
V2 = 1.4585 V
V3 = 2.480 mV (When Supply V3 is adjusted for -1.456743 V)
V4 = 0 Volts (When Supply V3 is adjusted for -1.456825 V)
V5 = -40.73μV
V6 = -45.78μV
Output = 5V

I'm not sure what is going on with the meter in the circuit VM1 as it is displaying 8.911 V even after a time domain simulation graphs a 5 V.

Regards

 

Can you share the simulation circuit in Circuit Lab?

I have not walked through the KVL, but when it comes to rolling your own IAs it is important to remember the input common mode range. You will often see graphs like this in integrated IAs:



You very well may be outside of the common mode range of the LM324 especially on the upper range in the later stages. You may also need to consider DC offsets like you said, the typical offset is 600uV (3mV max, but that's not going to be seen in the real world) at least in the TI datasheet and if you are trying to gain up 3mV, 600uVos eats into that.

If you can share the sim circuit, we can look at it in more details.

 

Connect both inputs to ground and then measure the voltages.
The output should be near 0V, of course.

 

Hello BitsNBytes,
Yes I have shared my circuit. Please see below.
I have not considered the input common mode range, so I will do some reading whilst you are viewing the circuit.
Thanks for the feedback.

https://www.circuitlab.com/circuit/22ap9ve47q4n/instrumentation-amplifier-circuit/

 

Hello Crutschow,
Assuming I did it at the right set of inputs which I believe are the actual IA itself OA3, the output voltage is 450μV. Actually this may explain why when I set V3 expecting it to work when set at 3mV it did not. I was only able to get the 5 volts output when I adjusted V3 to 2.480mV.
Having said that I am now a little confused. When I included the summing amplifiers I thought that would take care of it, however looking at the circuit, they are only removing the DC offset from the input stage. Does this suggest that I would need another summing amplifier at the input of OA3?

 

Why do you have various bias voltages throughout the circuit?
Those would not be used in a real circuit.

 

I included them to remove the DC from the inputs of the IA. I was trying to remove any common mode voltages.

 

Hi,
I am hoping I may be able to get some guidance and or ideas in identifying a problem I have with an instrumentation amplifier I have designed.

I have simulated the design in Circuit Lab, however I am not getting the expected output as desired during a DC sweep.
Essentially, I have a voltage difference test circuit which simulates a transducer. On the high side there is 1.4615 volts and the the low side 1.4585 volts, therefore there is a difference of three milliVolts (0.003 mV). I am trying to to achieve five volts output from the IA, therefore I have a gain of 1666.666. I have performed the amplification in two stages, the amplifier with a gain of 1000 and the remainder handled by the input circuit and RG.
I have introduced two summing amplifiers to remove the DC offset coming from the input stage.
When I run a time domain simulation I achieve the 5 Volt output as desired, however If I perform a DC sweep across the resistor in my test circuit R2 Vs the amplifier output, the output voltage does not begin from zero volts, rather the output only drops as low as 4.664 Volts, at R2 equal to zero ohms and 5 volts at 43 ohms.

I am wondering if there is problems with my DC offsets, however I am unsure what to expect as I have not implemented summing amplifiers in the instrumentation circuit before. They may be misplaced.
Initially what I did was set the DC offset at V4 for zero volts and V3 for 0.003 mV, but I was unable to see a change in the output. After further adjustments I set V3 for 2.48 mV which gave me a 5 Volt output when I performed a time domain simulation, but still have problems with the DC sweep.

Anyway that is a fairly big description which I hope is clear. I have attached my schematic, and have provided the voltages of various test points below, along with some graphed simulations. I would appreciate some feedback so I can get the circuit working as expected.

V1 = 1.4615 V
V2 = 1.4585 V
V3 = 2.480 mV (When Supply V3 is adjusted for -1.456743 V)
V4 = 0 Volts (When Supply V3 is adjusted for -1.456825 V)
V5 = -40.73μV
V6 = -45.78μV
Output = 5V

I'm not sure what is going on with the meter in the circuit VM1 as it is displaying 8.911 V even after a time domain simulation graphs a 5 V.

Regards

You're using an LM324, so it goes without saying you will have offset problems.
You are trying to amplify a 3mV signal with an amplifier with typical 2mV offset.
You have also got some very large value resistors through which input bias currents flow (40nA into 1MΩ =40mV). True, they are in a position where they should cancel out, but the LM324 has 5nA input offset current, which is another 5mV.
You also have some capacitors (C1, C2) in just the right places to make an oscillator.
You also have a peculiar power supply for OA3 - and I don't know how you are going to achieve that as LM324 contains four op-amps.

Most important question - is it a DC output transducer? (such as a strain gauge), or are you only interested in an AC signal. If the latter, your job becomes much, much easier.
If you really need DC amplification, then you need a better op-amp, with offset voltages in the microvolt range. Then you need lower value resistors to set the gain, and you really need most of the gain in the first stage.
I presume that the object of this exercise is to design an instrumentation amplifier, because if you just wanted to amplify the transducer, then you would simply buy a suitable IA.

 

Hello Ian,
Yes it is an exercise to build the IA with the LM324. Yes it is a DC output transducer.
Perhaps I should try and switch the gain around then. Would there be a particular ratio that would work best? When you say lower value resistors, what do you determine as low? I was concerned if I went to low it may overdrive the transistors inside.
I had C1 and C2 there for common mode noise. That was before I included the summing amplifiers.

 

I included them to remove the DC from the inputs of the IA. I was trying to remove any common mode voltages.

An instrumentation amp is designed to reject common-mode voltages (as long as they are within the common-mode voltage range of the amp).

 

RG is the one that should be low. It can be very low, as the voltage across it is equivalent to the input voltage. 3mV across 10Ω is 300uA, which is well within the amplifier's capabilities.
The first stage has a common mode gain of unity, so you can give it plenty of differential gain. The next stage (OA5/OA6 can be eliminated. The best place for the filtering would be on the inputs. The final stage (and get rid of the power supply resistors for OA3) can have a gain between 1 and 10. C2 is in the right place for a low-pass response, but C1 should go across R7.

 

Hi Ian,
Thanks for your feedback.
However I am a little confused. I thought you said before that most of the gain should be focused towards the front? With OA5/OA6 I need those as I need to remove the DC offset introduced by the transducer. Unfortunately due to the transducers nature the 1.4585 Volts is zero, so I need to remove it and I am not aware of any other techniques to be able to remove the offset, without also compensating for the other input.
Also, when you mention the filtering on the inputs, I assume you mean the inputs of OA3?
I will incorporate your suggestion about C2.

 

I need those as I need to remove the DC offset introduced by the transducer.

You need to remove the offset directly at the input.
Use one input of the instrumentation amp for the transducer signal and connect the offset voltage to the other input.

But designing an instrumentation amp for your low mV signal requirements is quite difficult with a discrete design, due to the tolerances of the resistors.
Why not use an IC instrumentation amp which will have much better characteristics?

 

Hi Crutschow,
I'm a bit unsure of what you mean. I will use the test point of my schematic as references. You mean to connect the transducer signal coming from V1 through OA1, remove OA5 and have the transducer signal at the input of R6, near V5? That bit makes sense assuming I have understood correctly? Where I am confused is what to do with the other transducer signal V2.
When you say connect the offset voltage to the other input, Do you mean to keep OA6 and the existing circuit to do this? I'm a bit lost with that part as you can probably tell.
Is it possible you could do a quick sketch to describe what you mean?

 

Where I am confused is what to do with the other transducer signal V2.

And I'm confused about what your transducer signal really looks like.
Does it have an offset or is that just the common-mode voltage of the differential signal?

If it's a common mode voltage, then the instrumentation amp, by itself, will ignore that and only amplify the difference signal.
I don't understand why you are adding extra op amps and internal voltages for that purpose(?).

 

Below is the LTspice sim for a standard 3 op-amp instrumentation amp configuration with your input (as I understand it):
The real circuit will not likely work that well, due to component tolerances and op amp offsets, which are not simulated here.

Does that do what you want?

 

Hi Crutschow,
Thanks for your feedback. I had this circuit initially and it worked ok ish, however the reason I need to create the DC offset is that it is a requirement from my teacher that we include it, and due to the non-zero offset introduced from the transducer. That is why I tried to include the summation amplifiers. I was warned that there was going to be likely issues with common and differential mode signals, and gain.
I thought if I added the summation amplifiers the problem would be resolved.
Taking a step back though. In a previous post I mentioned that I needed to adjust the V3 to around 2.480 mV to be able to get 5 Volts out only when that was a constant difference between the inputs. When you mentioned to short the inputs and measure the output there was an error of 450μV. It seems a bit crazy, but I'm wondering if I were to introduce another offset after the summation amplifiers to deal with that? I'm wondering if I had that error resolved I might be able to do a DC sweep of the 43Ω resistor R2 and get a zero to 5 Volt output?
I think within the context of what I was asked to do and what with, I assume the teacher always saw that there would be issues and we wound need to see if they could be addressed in any way. Probably more to understand and be familiar with these limitations.

 

I think within the context of what I was asked to do and what with, I assume the teacher always saw that there would be issues and we wound need to see if they could be addressed in any way. Probably more to understand and be familiar with these limitations.

I was wondering if this was a class exercise, which would explain the desire to add additional op-amps.
For your understanding, OA5 and OA6 are non-inverting and inverting stages respectively so there will naturally be an imbalance.
Integrated instrumentation amplifiers are usually 2 or 3 op-amp based; in the case of 3 op-amp INA the gain stage is in the front two and the output is unity gain.

Sometimes one does need to roll your own especially if you need a wide bandwidth INA which the last time I looked (many years ago) do not exist. TI, ADI, etc. do not make them (no money involved).

Edit: to allow the TINA file if anyone is interested.

 

I need to create the DC offset is that it is a requirement from my teacher that we include it

It likely is best to cancel the DC offset at the amp input before it is amplified, otherwise you may have problems with amplifier saturation.

 

Hi BitsNBytes,
Thanks for your reply.
Did you get the same outcomes as I did when you ran a simulation. As in, 5 Volts out via a time sim, but not a zero to 5 if you swept R2?
I'm certainly no expert, and I'm happy to take on advice. This was the best I could do with what was required.
I would like to know it you believe I have missed something, or do something different?
When you mention the common mode range, I have not checked the data sheet just yet, however would you mind explaining how to read the input common mode voltage vs supply voltage?