I have cascaded two instrumentation amplifier. I have this circuit for micro volt amplifier. I got 100 gain voltage in first stage. but in the second amplifier stage, I got more voltage that 100 gain. for ex, when i apply 100 uv signal then i got 10 mV signal at first stage. but in second stage ideally i should got 1 V signal but in the circuit i got fluctuating 3.2 to 3.5 V signal. Please guide. I want to measure floating low level signal so used differential amplifier

 

hi Pankaj,
Welcome to AAC.
It would help if you edited your circuit drawing to show the actual basic circuit you are querying.
It is almost impossible to follow.
E

 

Have you considered the effect of the amplifiers' input offset voltage, which is multiplied by the gain?

 

I have cascaded two instrumentation amplifier. I have this circuit for micro volt amplifier. I got 100 gain voltage in first stage. but in the second amplifier stage, I got more voltage that 100 gain. for ex, when i apply 100 uv signal then i got 10 mV signal at first stage. but in second stage ideally i should got 1 V signal but in the circuit i got fluctuating 3.2 to 3.5 V signal. Please guide. I want to measure floating low level signal so used differential amplifier

There are a few things why its working the way it is. First, the input ground referencing is not symmetrical to the input, second, the balance buffer is out of mirror to the output op amp in the IC. That is going to offset the signal and bias. So the buffer should have an Rin and feedback the same value as the last stage op amp in the 8421 Ic. The last thing that is incorrect is the lack of loading and coupling resistors to the next stage. Also, the ground input reference is only needed in the first stage.

I'll edit this post here, and add a schematic to show you how that is suppose to be assembled.
EDIT: attached is schematic of how it should be, but I question the use of the ISO124 since its an unbalanced isolator that different supplies are not tied together, but a simple clamp circuit is used commonly.

 

Certainly the purpose of the single buffer stuck between the stages is unclear. Please explain what it is supposed to be doing.
After designing a nicely balanced amplifier string, why deliberately unbalance it in so many places? That makes no sense at all to me.

 

Certainly the purpose of the single buffer stuck between the stages is unclear. Please explain what it is supposed to be doing.
After designing a nicely balanced amplifier string, why deliberately unbalance it in so many places? That makes no sense at all to me.

we have used OP177 for each op amp for offset voltage compensation. We are providing reference voltage on AD 8421 reference pin to offset output voltage exactly as per gain and nullify input offset error

 

There are a few things why its working the way it is. First, the input ground referencing is not symmetrical to the input, second, the balance buffer is out of mirror to the output op amp in the IC. That is going to offset the signal and bias. So the buffer should have an Rin and feedback the same value as the last stage op amp in the 8421 Ic. The last thing that is incorrect is the lack of loading and coupling resistors to the next stage. Also, the ground input reference is only needed in the first stage.

I'll edit this post here, and add a schematic to show you how that is suppose to be assembled.

Thank you for reply. Waiting for your schematic for reference

 

hi Pankaj,
Welcome to AAC.
It would help if you edited your circuit drawing to show the actual basic circuit you are querying.
It is almost impossible to follow.
E

Will post simplified circuit soon

 

Issues to address
1) For gains of 100X set R4 and R5 to 100 ohms (not 1k).

2) AD8421 Input Bias Current Max (datasheet page 3) is 0.6 nA at 25 deg. C and 6 nA over temperature. Average Tempo is 50 pA/deg. C. With R3 = 10M input offset voltage (for a zero ohm source) is Max 6 mV at 25 deg. C, 60 mV over temperature with a tempco of 500 uV/deg. C. The Max output offset from the first stage (gain-of-100) is 600 mV at 25 deg. C, 6V over temperature with a tempco of 50 mV/deg. C. From this I'd say the 10M ohm R3 is too high.

Consider reducing R3. For example, calculate the minimum resistance for which your application will work, the maximum resistance for which your application will work and select the geometric mean of these two values. Calculate this over temperature as above.

3. Based on #2 the offset voltage adjustment range is inadequate.

4) The Schottky diode voltage references have a very high tempco and are not suitable. Looking at the 1N5818 datasheet we see the forward voltage goes from 180 mV at 25 deg. C to 90 mV at 125 deg. C. The tempco is -900 uV/deg. C. or -667 ppm/deg. C. Because the voltage offset circuit is at the output (after a gain-of-100) this equates to -9 uV/deg. C referenced to the input. This seems too high for a circuit measuring only 100 uV.

I suggest using precision voltage references in place of the Schottky diodes and extending the offset voltage range as high as +/-6V to account for the full temperature range of -40 to +85 deg. C.



5. R25 is not needed.

6. C17 should be connected to GND1V1 and not earth GND. As connected noise voltage between the two circuit commons is pumped directly into the input of U4.


AD8421 Datasheet https://www.analog.com/media/en/technical-documentation/data-sheets/ad8421.pdf

1N5819 Datasheet https://www.vishay.com/docs/88525/1n5817.pdf

ISO124 Datasheet
https://www.ti.com/lit/ds/symlink/i...l=https%3A%2F%2Fwww.ti.com%2Fproduct%2FISO124

 

There are a few things why its working the way it is. First, the input ground referencing is not symmetrical to the input, second, the balance buffer is out of mirror to the output op amp in the IC. That is going to offset the signal and bias. So the buffer should have an Rin and feedback the same value as the last stage op amp in the 8421 Ic. The last thing that is incorrect is the lack of loading and coupling resistors to the next stage. Also, the ground input reference is only needed in the first stage.

I'll edit this post here, and add a schematic to show you how that is suppose to be assembled.
EDIT: attached is schematic of how it should be, but I question the use of the ISO124 since its an unbalanced isolator that different supplies are not tied together, but a simple clamp circuit is used commonly.View attachment 322391

Thank you for simplified schematic and giving your valuable time. Can you guide for best simulation software where I can apply this circuit and simulate it for better understanding. I want to know about best simulation software which gives correct output for better understanding before layout preparation. We have used ISO124 for signal isolation. We will use this system to measure micro volt level signal from superconducting taps which is exposed under high current so need isolation between input and output stage to protect our measurement and DAQ system.

 

Issues to address
1) For gains of 100X set R4 and R5 to 100 ohms (not 1k).

2) AD8421 Input Bias Current Max (datasheet page 3) is 0.6 nA at 25 deg. C and 6 nA over temperature. Average Tempo is 50 pA/deg. C. With R3 = 10M input offset voltage (for a zero ohm source) is Max 6 mV at 25 deg. C, 60 mV over temperature with a tempco of 500 uV/deg. C. The Max output offset from the first stage (gain-of-100) is 600 mV at 25 deg. C, 6V over temperature with a tempco of 50 mV/deg. C. From this I'd say the 10M ohm R3 is too high.

Consider reducing R3. For example, calculate the minimum resistance for which your application will work, the maximum resistance for which your application will work and select the geometric mean of these two values. Calculate this over temperature as above.

3. Based on #2 the offset voltage adjustment range is inadequate.

4) The Schottky diode voltage references have a very high tempco and are not suitable. Looking at the 1N5818 datasheet we see the forward voltage goes from 180 mV at 25 deg. C to 90 mV at 125 deg. C. The tempco is -900 uV/deg. C. or -667 ppm/deg. C. Because the voltage offset circuit is at the output (after a gain-of-100) this equates to -9 uV/deg. C referenced to the input. This seems too high for a circuit measuring only 100 uV.

I suggest using precision voltage references in place of the Schottky diodes and extending the offset voltage range as high as +/-6V to account for the full temperature range of -40 to +85 deg. C.

View attachment 322404

5. R25 is not needed.

6. C17 should be connected to GND1V1 and not earth GND. As connected noise voltage between the two circuit commons is pumped directly into the input of U4.


AD8421 Datasheet https://www.analog.com/media/en/technical-documentation/data-sheets/ad8421.pdf

1N5819 Datasheet https://www.vishay.com/docs/88525/1n5817.pdf

ISO124 Datasheet
https://www.ti.com/lit/ds/symlink/iso124.pdf?ts=1715787190592&ref_url=https%3A%2F%2Fwww.ti.com%2Fproduct%2FISO124

Thank you for reply. Sorry for wrong component value and parts. In actual curcuit, we have used 100 ohms for in both stage for 10K gain. Also we have used junction diode in offset network of OP177 instead of Schottky diode. R3 value is 1M in our circuit. Soon i will share schematic with actual value

 

Thank you for reply. Sorry for wrong component value and parts. In actual curcuit, we have used 100 ohms for in both stage for 10K gain. Also we have used junction diode in offset network of OP177 instead of Schottky diode. R3 value is 1M in our circuit. Soon i will share schematic with actual value

Okay, a junction diode -- if you mean a silicon diode -- will have roughly the same tempco (in ppm/deg. C) as the Schottky diode. If +15V and -15V are regulated they most likely have a much lower tempco than a diode. For example, the ubiquitous LM317 tempco is less than 60 ppm/deg. C.

 

What is missing is a statement as to the exact desired performance of the system. That will include what the intended load connected to the amplifier is intended to be, and the signal source details, including is the source an isolated (not ground referenced voltage) or a differential source, such as a strain gage, or something else. Also the source anticipated output voltage, and the required system frequency response range.
That is because the AD8421 inst amp gain/frequency product is a big part of the frequency.

AND, why use a second differential input amplifier when the output from the first amplifier is not differential?? An IA input provides no benefit following a low impedance, common referenced source, such as the AF8421 device output. The output impedance is less than 1000 ohms over the design operation range.
Instrument amplifiers are seldom cascaded because that is seldom cost effective.

 

What is missing is a statement as to the exact desired performance of the system. That will include what the intended load connected to the amplifier is intended to be, and the signal source details, including is the source an isolated (not ground referenced voltage) or a differential source, such as a strain gage, or something else. Also the source anticipated output voltage, and the required system frequency response range.
That is because the AD8421 inst amp gain/frequency product is a big part of the frequency.

AND, why use a second differential input amplifier when the output from the first amplifier is not differential?? An IA input provides no benefit following a low impedance, common referenced source, such as the AF8421 device output. The output impedance is less than 1000 ohms over the design operation range.
Instrument amplifiers are seldom cascaded because that is seldom cost effective.

I think the TS is trying to build with what they have. Because there is already single chip solutions which have better low noise performance.

 

What about the second part of the question?? The TS has those other amplifiers. Also, there are better ways to provide an input to an IA than the scheme used. BUT, Really, why use a differential input instrument amplifier to follow a single ended output?? THAT is looking for problems and finding them.

 

What about the second part of the question?? The TS has those other amplifiers. Also, there are better ways to provide an input to an IA than the scheme used. BUT, Really, why use a differential input instrument amplifier to follow a single ended output?? THAT is looking for problems and finding them.

Other than reducing a few parts its no different than setting up a quad op amp for more gain compared to adding another IA.
It makes no different on the single ended output because you can add the other op amp if balanced operation is needed. Of course, there are balanced output IAs too. Problem the TS observed is you can't generically convert the unbalanced output to balanced and have to use the circuit that is described in the IA's datasheet to convert the output to balanced.

 

There is that unfortunate consideration called "Gain Bandwidth Product", which is why the gain versus frequency plot for many devices is not a flat line. The TS mentions two cascaded stages each with a gain of 100. In some amplifier configurations that could be a gain of 100 from each input, inverting and non-inverting, for an actual gain of 200.
And doing all of the amplifying in one stage greatly limits the frequency response. So there certainly is a good reason for cascading stages, if frequency response matters.

 

There is that unfortunate consideration called "Gain Bandwidth Product", which is why the gain versus frequency plot for many devices is not a flat line. The TS mentions two cascaded stages each with a gain of 100. In some amplifier configurations that could be a gain of 100 from each input, inverting and non-inverting, for an actual gain of 200.
And doing all of the amplifying in one stage greatly limits the frequency response. So there certainly is a good reason for cascading stages, if frequency response matters.

looking at the schematic in post #1, the front end is really decoupled so it looks like low frequency like a temp/humidity sensor.

 

Dear All,

Here I have attached updated schematic for two stage micro volt signal amplifier card. In this schematic I have used first stage in differential mode and second stage in inverting mode of amplifier as per feedback given in thread. We want 10K total gain for small scale micro volt signal amplification. In our application, we want to acquired small voltage taps signal of superconducting magnet during current charging mode. Very high current flows in magnet and few voltage taps taken across magnet. we want to measure this voltage taps which are floating and in micro volt range. This schematic shows amplification stage. After amplification, we need to isolate this signal and driving circuit to acquire this data in DAQ system.

Please see this circuit and give your feedback. Is this the correct way to detect micro volt level signal? And give your suggestion and more reliable options.

 

The challenge will be in verifying the accuracy. That is always the challenge, second only to providing an accurate calibration.