I am looking at the AD5621. It says that the INL and DNL error are WAY below 1 LSB. Is there a gotcha with this? Did they do something to specs to massage the numbers?

Thanks!

 

I am looking at the AD5621. It says that the INL and DNL error are WAY below 1 LSB. Is there a gotcha with this? Did they do something to specs to massage the numbers?

Thanks!

I don't think so. According to the datasheet, the AD5621 is designed using a string of equal resistors instead of the usual R/2R resistor ladder network. Presumably it is easier to create consistent values of R in chip fabrication.

 

Thanks!