Ideas for driving high side NMOS

Thread Starter


Joined Jan 5, 2016
I was looking at traces like these last night. It's really great how circuits like this can be sim'ed and the power dissipated in the FET plotted to show where the loses are. Even tho the transitions appeared sharp, after zooming in to where power dissipation spiked it was obvious that the miller effect was slowing the turn-off of Q1/M1 ie. I needed to sink more current from the gate.