Q: You are to design a synchronous MOD-14 counter for use in a hotel lift. The counter must count up from 1 to 12, skip 13, and continue counting to 15, and then back to 1 to continue the cycle. If the counter somehow enters an unused state then it should remain in that state forever. The only memory elements you have available are positive edge triggered D flip flops.

First of all, can D flip flops have asynchronous inputs CLEAR and PRESET, similar to J-K flip flops? If they can, then I'm thinking of resetting the LSB flip flop when the sequence is 1101 (decimal 13) so I get 1100, but how do I turn that into a 1110 (decimal 14)?

Could someone please help? Thanks.

 

It sounds like what you need to do is build your 4-bit counter with a pre-load feature. You could then have the counter preload the count of 14 on the thirteenth clock and preload the count of 1 on the sixteenth clock.

hgmjr

 

How will I be able to parallel load 2 different counts? I'm thinking of connecting the outputs that correspond to decimal 13 into an AND gate. Then I'll feed the output into the PL input of each flip flop.

Is that all there is to it?

 

You could build up the logic for a "data selector" at the input of the pre-load circuitry. Then decode the two counts that require non-sequential handling.

Not exactly an elegant solution but a solution nevertheless.

hgmjr